mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2025-12-10 07:44:53 +01:00
b7ca23da1c
Currently, if atf env is set in the secure board. secure boot sequence gets bypassed. This is not an expected behaviour. So, removed support the atf env variable. Instead atf enabled status can be verified using get_secure_state scm call. Moreover, as per current design get_secure_state scm call will not be implemented in ATF in future as well. If its implemented, Bit 7 should be made to 1. Change-Id: I0adcfac7bbcb10fe6906fd8a3f10a440ec7080ae Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
146 lines
3.5 KiB
C
146 lines
3.5 KiB
C
/*
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* Copyright (c) 2015-2017, 2019 The Linux Foundation. All rights reserved.
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef ___QCA_COMMON_H_
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#define ___QCA_COMMON_H_
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#include <asm/u-boot.h>
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#include <asm/arch-qca-common/smem.h>
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#include <asm/arch-qca-common/gpio.h>
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#ifdef CONFIG_ARCH_IPQ5018
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#include <asm/arch-ipq5018/clk.h>
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#endif
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#ifdef CONFIG_ARCH_IPQ6018
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#include <asm/arch-ipq6018/clk.h>
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#endif
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#ifdef CONFIG_ARCH_IPQ9574
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#include <asm/arch-ipq9574/clk.h>
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#endif
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#ifdef CONFIG_ARCH_IPQ807x
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#include <asm/arch-ipq807x/clk.h>
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#endif
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#ifdef CONFIG_ARCH_IPQ40xx
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#include <asm/arch-ipq40xx/clk.h>
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#endif
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#ifdef CONFIG_ARCH_IPQ806x
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#include <asm/arch-ipq806x/clk.h>
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#endif
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#define XMK_STR(x)#x
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#define MK_STR(x)XMK_STR(x)
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/* Crashdump levels */
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enum {
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FULL_DUMP,
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MINIMAL_DUMP
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};
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struct ipq_i2c_platdata {
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int type;
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};
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typedef struct {
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uint base;
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uint clk_mode;
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struct mmc *mmc;
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int dev_num;
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} qca_mmc;
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/* Reserved-memory node names and register value*/
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typedef struct {
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const char *nodename;
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u32 val[2];
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} add_node_t;
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typedef struct qca_gpio_config gpio_func_data_t;
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typedef struct {
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gpio_func_data_t *gpio;
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unsigned int gpio_count;
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}spi_cfg_t;
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typedef struct {
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gpio_func_data_t *gpio;
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unsigned int gpio_count;
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}qpic_nand_cfg_t;
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typedef struct {
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spi_cfg_t spi_nor_cfg;
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qpic_nand_cfg_t qpic_nand_cfg;
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}board_param_t;
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int qca_mmc_init(bd_t *, qca_mmc *);
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#if defined(CONFIG_QCA_MMC) && !defined(CONFIG_SDHCI_SUPPORT)
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int board_mmc_env_init(qca_mmc mmc_host);
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#endif
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int ipq_board_usb_init(void);
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int spi_nand_init(void);
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void board_mmc_deinit(void);
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void board_pci_deinit(void);
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void set_flash_secondary_type(qca_smem_flash_info_t *);
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void dump_func(unsigned int dump_level);
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int do_dumpqca_flash_data(const char *);
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int do_dumpqca_usb_data(unsigned int dump_level);
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int apps_iscrashed(void);
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int is_hlos_crashed(void);
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int ipq_read_tcsr_boot_misc(void);
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int set_uuid_bootargs(char *boot_args, char *part_name, int buflen, bool gpt_flag);
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int get_eth_mac_address(uchar *enetaddr, uint no_of_macs);
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void set_ethmac_addr(void);
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void aquantia_phy_reset_init_done(void);
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void aquantia_phy_reset_init(void);
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int bring_sec_core_up(unsigned int cpuid, unsigned int entry, unsigned int arg);
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int is_secondary_core_off(unsigned int cpuid);
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int smem_read_cpu_count(void);
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int get_soc_hw_version(void);
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int is_atf_enabled(void);
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struct dumpinfo_t{
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char name[16]; /* use only file name in 8.3 format */
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uint32_t start;
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uint32_t size;
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int is_aligned_access; /* non zero represent 4 byte access */
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uint32_t is_redirected; /* If this flag is set, 'start' is considered a ptr
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* to address to be dumped
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*/
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uint32_t offset; /* offset to be added to start address */
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uint32_t dump_level;
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uint32_t to_compress; /* non-zero represent for compressed dump*/
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};
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extern struct dumpinfo_t dumpinfo_n[];
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extern int dump_entries_n;
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extern struct dumpinfo_t dumpinfo_s[];
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extern int dump_entries_s;
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#define MMC_IDENTIFY_MODE 0
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#define MMC_DATA_TRANSFER_MODE 1
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#define MMC_DATA_TRANSFER_SDHCI_MODE 2
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#define MMC_MODE_HC 0x800
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#define SPI_DEFAULT_ADDR_LEN 3
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#define SPI_MAX_ADDR_LEN 4
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#define MAX_BOOT_ARGS_SIZE 64
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#endif /* __QCA_COMMON_H_ */
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