Tom Rini fe84c48eeb Xilinx changes for v2017.09 ... Zynq: - Add Z-Turn board support fpga: - Remove intermediate buffer from code Zynqmp: - dts cleanup - change psu_init handling - Add options to get silicon version - Fix time handling - Map OCM/TCM via MMU - Add new clock driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlmBs2kACgkQykllyylKDCFUGgCgmfop8Ki5+6QI7XQRP7u8nhjw KakAn1sYIRDFQ34AoxmiYa6RTmjepLMv =1Gh3 -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2017.09 Zynq: - Add Z-Turn board support fpga: - Remove intermediate buffer from code Zynqmp: - dts cleanup - change psu_init handling - Add options to get silicon version - Fix time handling - Map OCM/TCM via MMU - Add new clock driver		2017-08-04 07:23:32 -04:00
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asm	Xilinx changes for v2017.09	2017-08-04 07:23:32 -04:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00