York Sun 856e4b0d7f powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3 ... When DDR data rate is higher than 1200MT/s or controller interleaving is enabled, additional cycle for write-to-read turnaround is needed to satisfy dynamic ODT timing. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-02-10 23:40:02 -06:00
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cpu	powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3	2011-02-10 23:40:02 -06:00
include/asm	Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx	2011-02-09 20:50:26 +01:00
lib	Replace "FLASH" strings with "Flash" or "flash"	2011-01-19 00:02:37 +01:00
config.mk	Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGS	2011-01-25 22:22:30 +01:00