mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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7e514eef02
This patch does 3 things: 1. Enables ECC by setting 21st bit of L2CTLR. 2. Restore data and tag RAM latencies to 3 cycles because iROM sets 0x3000400 L2CTLR value during switching. 3. Disable clean/evict push to external by setting 3rd bit of L2ACTLR. We need to restore this here due to switching. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
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| .. | ||
| cpu | ||
| dts | ||
| imx-common | ||
| include | ||
| lib | ||
| mach-at91 | ||
| mach-davinci | ||
| mach-highbank | ||
| mach-keystone | ||
| mach-kirkwood | ||
| mach-nomadik | ||
| mach-orion5x | ||
| mach-tegra | ||
| mach-versatile | ||
| mvebu-common | ||
| config.mk | ||
| Kconfig | ||
| Kconfig.debug | ||
| Makefile | ||