mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2026-02-12 11:00:28 +01:00
Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with
hwconfig parameters. The syntax is
setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>"
The mode values for memory controller interleaving are
cacheline
page
bank
superbank
The mode values for bank interleaving are
cs0_cs1
cs2_cs3
cs0_cs1_and_cs2_cs3
cs0_cs1_cs2_cs3
Signed-off-by: York Sun <yorksun@freescale.com>
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| include/asm | ||
| lib | ||
| config.mk | ||