Paul Burton 7953354b07 MIPS: Join the coherent domain when a CM is present ... MIPS Linux expects the bootloader to leave the boot CPU a member of the coherent domain when running on a system with a CM, and we will need to do so if we wish to make use of IOCUs to have cache-coherent DMA in U-Boot (and on some systems there is no choice in that matter). When a CM is present, join the coherent domain after completing cache initialisation. Signed-off-by: Paul Burton <paul.burton@imgtec.com>		2016-09-21 15:04:04 +02:00
..
ashldi3.c	dm: mips: Import libgcc components from Linux	2012-08-17 20:13:48 +02:00
ashrdi3.c	dm: mips: Import libgcc components from Linux	2012-08-17 20:13:48 +02:00
bootm.c	libfdt: Introduce new ARCH_FIXUP_FDT option	2016-07-31 19:37:08 -06:00
cache.c	MIPS: L2 cache support	2016-09-21 15:04:04 +02:00
cache_init.S	MIPS: Join the coherent domain when a CM is present	2016-09-21 15:04:04 +02:00
libgcc.h	dm: mips: Import libgcc components from Linux	2012-08-17 20:13:48 +02:00
lshrdi3.c	dm: mips: Import libgcc components from Linux	2012-08-17 20:13:48 +02:00
Makefile	MIPS: Support dynamic I/O port base address	2016-02-01 22:13:25 +01:00