u-boot-2016/drivers/net/phy
Stefan Roese a8c3eca433 net: phy: marvell: Fix problem with phy_reset() clearing BMCR
With commit a058052c [net: phy: do not read configuration register on
reset], phy_reset() will clear the BMCR register. Resulting in bit 12
being cleared (A/N enable). This leads to autonegotiation link problems,
at least on the Marvell Armada ClearFog board. I suspect that other
boards using this driver will be affected as well.

At the of m88e1111s_config(), phy_reset() is called. This is not needed
for the PHY to load the changed configuration, as phy_reset() is called
a few lines before already. So lets call genphy_restart_aneg() here
instead to start the AN correctly.

Tested on clearfog.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Hao Zhang <hzhang@ti.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-02-18 11:32:03 -06:00
..
aquantia.c
atheros.c
broadcom.c
cortina.c
davicom.c
et1011c.c
generic_10g.c
lxt.c
Makefile
marvell.c
micrel.c
miiphybb.c
mv88e61xx.c
mv88e61xx.h
mv88e6352.c
natsemi.c
phy.c
realtek.c
smsc.c
teranetics.c
ti.c
vitesse.c