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716ff5ce1d
In order to completely halt the AVP processor, we should simply write FLOW_MODE_STOP without any extra options that allow wakeup. Amend the code to do this. I believe that enabling FIQ_1 and IRQ_1 allow the CPU to be awoken by interrupts. We don't want this; if later SW wishes to use the AVP, it should be reset and booted from scratch. Related, the bits that were previously IRQ_1 and FIQ_1 have a slightly different definition starting with Tegra114, so the values we're writing don't entirely make sense there anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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| arm720t | ||
| arm920t | ||
| arm926ejs | ||
| arm946es | ||
| arm1136 | ||
| arm1176 | ||
| arm_intcm | ||
| armv7 | ||
| armv8 | ||
| at91-common | ||
| pxa | ||
| sa1100 | ||
| tegra-common | ||
| tegra20-common | ||
| tegra30-common | ||
| tegra114-common | ||
| tegra124-common | ||
| Makefile | ||
| u-boot-spl.lds | ||
| u-boot.lds | ||