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https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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Before disable cache, need to first flush cache.
There maybe dirty data in D-Cache before disable D-Cache.
After disable D-Cache, the first store instructions in
psci_v7_flush_dcache_all will directly store registers
{r4-r5, r7, r9-r11, lr} to memory.
If there is dirty data before disable D-Cache,
psci_v7_flush_dcache_all will flush data to memory,
and may overwrite the memory that hold the registers
{r4-r5, r7, r9-r11, lr}.
So before disable cache, first flush D-Cache.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Hongbo Zhang <hongbo.zhang@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Tom Rini <trini@konsulko.com>
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| .. | ||
| cpu | ||
| dts | ||
| imx-common | ||
| include | ||
| lib | ||
| mach-at91 | ||
| mach-bcm283x | ||
| mach-davinci | ||
| mach-exynos | ||
| mach-highbank | ||
| mach-integrator | ||
| mach-keystone | ||
| mach-kirkwood | ||
| mach-meson | ||
| mach-mvebu | ||
| mach-omap2 | ||
| mach-orion5x | ||
| mach-rmobile | ||
| mach-rockchip | ||
| mach-s5pc1xx | ||
| mach-snapdragon | ||
| mach-socfpga | ||
| mach-stm32 | ||
| mach-sunxi | ||
| mach-tegra | ||
| mach-uniphier | ||
| mach-versatile | ||
| mach-zynq | ||
| thumb1/include/asm/proc-armv | ||
| config.mk | ||
| Kconfig | ||
| Kconfig.debug | ||
| Makefile | ||