mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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599391c231
This change will enable page_scope_read & multipage_read support for QPIC. QPIC version 2.0 onwards , QPIC support page_scope_read & multipage_read command to enhance the read performance. In normal page read command SW is needed to write EXEC_CMD register for each Code word and collect any Status related to that CW before issueing EXEC_CMD for next CW. For page_scope read command SW is required to issue EXEC_CMD only once for a page. Controller HW takes care of Codeword specific details and automatically returns status associated with each CW to BAM pipe, dedicated for status deposition. enabling all bits in NAND_AUTO_STATUS_EN will require 4 data descriptors of 24 bytes each. This will publish all NANDc status registers in system memory. For multipage_read command SW is required to issue EXEC_CMD only once for all the pages which configured in QPIC_NAND_MULTI_PAGE_CMD register. All interrupts will be operational and valid in these modes. To check the status for each codeword, it is not possible to access the status registers while the read command is operational in page_scope & multi_page read modes. Hence, another feature to publish the status data (for all NAND status registers) by programming the NAND_AUTO_STATUS_EN register. For serial NAND: Read command for page_scope_read = 0x78800032 (QPIC_NAND_FLASH_CMD) Read command for multi_page_read = 0x78400032 (QPIC_NAND_FLASH_CMD) For Parallel NAND: Read command for page_scope_read = 0x00800032 (QPIC_NAND_FLASH_CMD) Read command for multi_page_read = 0x00400032 (QPIC_NAND_FLASH_CMD) Now we fixed maximum data bytes read in one go 128KiB(2KiB page), 256KiB (4KiB page), 512 KiB (8kiB page), because from upper layer we are getting more than 128KiB data bytes request in one go. if so just changing the value of "MAX_MULTI_PAGE" macro will increase the maximum data bytes in one go. Change-Id: I48eea51ff8f5f79f3490d8a538c295ecc3eeee19 Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
294 lines
10 KiB
C
294 lines
10 KiB
C
/* Copyright (c) 2012, 2015-2017 The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __BAM_H
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#define __BAM_H
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#include <compiler.h>
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#define BAM_V170 1
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#if BAM_V170
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#define BAM_IRQ_SRCS(x, n) (0x00003000 + 0x1000 * (n) + (x))
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#define BAM_IRQ_SRCS_MSK(x, n) (0x00003004 + 0x1000 * (n) + (x))
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#define BAM_IRQ_SRCS_UNMASKED(x) (0x00003018 + (x))
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#define BAM_TRUST_REG(x) (0x00002000 + (x))
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#define BAM_P_CTRLn(n, x) (0x00013000 + 0x1000 * (n) + (x))
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#define BAM_P_RSTn(n, x) (0x00013000 + 0x4 + 0x1000 * (n) + (x))
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#define BAM_P_IRQ_STTSn(n, x) (0x00013000 + 0x10 + 0x1000 * (n) + (x))
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#define BAM_P_IRQ_CLRn(n, x) (0x00013000 + 0x14 + 0x1000 * (n) + (x))
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#define BAM_P_IRQ_ENn(n, x) (0x00013000 + 0x18 + 0x1000 * (n) + (x))
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#define BAM_P_TRUST_REGn(n, x) (0x2020 + 0x4* (n) + (x))
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#define BAM_P_SW_OFSTSn(n, x) (0x00013800 + 0x1000 * (n) + (x))
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#define BAM_P_EVNT_REGn(n, x) (0x00013818 + 0x1000 * (n) + (x))
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#define BAM_P_DESC_FIFO_ADDRn(n, x) (0x0001381C + 0x1000 * (n) + (x))
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#define BAM_P_FIFO_SIZESn(n, x) (0x00013820 + 0x1000 * (n) + (x))
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#else
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#define BAM_IRQ_SRCS(x, n) (0x00000800 + (0x80 * (n)) + (x))
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#define BAM_IRQ_SRCS_MSK(x, n) (0x00000804 + (0x80 * (n)) + (x))
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#define BAM_IRQ_SRCS_UNMASKED(x) (0x00000030 + (x))
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#define BAM_TRUST_REG(x) (0x00000070 + (x))
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#define BAM_P_CTRLn(n, x) (0x00001000 + 0x1000 * (n) + (x))
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#define BAM_P_RSTn(n, x) (0x00001000 + 0x4 + 0x1000 * (n) + (x))
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#define BAM_P_IRQ_STTSn(n, x) (0x00001000 + 0x10 + 0x1000 * (n) + (x))
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#define BAM_P_IRQ_CLRn(n, x) (0x00001000 + 0x14 + 0x1000 * (n) + (x))
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#define BAM_P_IRQ_ENn(n, x) (0x00001000 + 0x18 + 0x1000 * (n) + (x))
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#define BAM_P_TRUST_REGn(n, x) (0x00001000 + 0x30 + 0x1000 * (n) + (x))
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#define BAM_P_SW_OFSTSn(n, x) (0x00001800 + 0x1000 * (n) + (x))
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#define BAM_P_EVNT_REGn(n, x) (0x00001818 + 0x1000 * (n) + (x))
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#define BAM_P_DESC_FIFO_ADDRn(n, x) (0x0000181C + 0x1000 * (n) + (x))
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#define BAM_P_FIFO_SIZESn(n, x) (0x00001820 + 0x1000 * (n) + (x))
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#endif
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#define BAM_DESC_SIZE 8
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#define BAM_CE_SIZE 16
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#define BAM_MAX_DESC_DATA_LEN 0xFFFF
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#define BAM_NDP_MAX_DESC_DATA_LEN 0x7FFF
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#define BAM_DATA_READ 0
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#define BAM_DATA_WRITE 1
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#define BAM_CTRL_REG(x) (0x0000 + (x))
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#define BAM_SW_RST_BIT_MASK 1
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#define BAM_ENABLE_BIT_MASK (1 << 1)
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#define BAM_DESC_CNT_TRSHLD_REG(x) (0x0008 + (x))
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#define COUNT_TRESHOLD_MASK 0xFF
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#define BAM_IRQ_MASK (1 << 31)
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#define BAM_IRQ_EN (1 << 31)
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#define P_IRQ_MASK (1)
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#define BAM_IRQ_SRCS_PIPE_MASK 0x7FFF
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#define BAM_IRQ_STTS(x) (0x00000014 + (x))
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#define BAM_IRQ_EN_REG(x) (0x001C + (x))
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#define BAM_TIMER_EN_MASK (1 << 4)
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/* Available only in BAM-Lite */
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#define BAM_EMPTY_EN_MASK (1 << 3)
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#define BAM_ERROR_EN_MASK (1 << 2)
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/* Available only in BAM */
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#define BAM_HRESP_ERR_EN_MASK (1 << 1)
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#define BAM_EE_MASK (7 << 0)
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#define BAM_RESET_BLK_MASK (1 << 7)
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#define BAM_LOCK_EE_CTRL_MASK (1 << 13)
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#define BAM_CNFG_BITS(x) (0x0000007C + (x))
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#define P_SYS_MODE_MASK (1 << 5)
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/* 1: Producer mode 0: Consumer mode */
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#define P_DIRECTION_SHIFT 3
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#define P_LOCK_GRP_SHIFT 16
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#define P_ENABLE (1 << 1)
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#define P_DESC_FIFO_PEER_OFST_MASK 0xFF
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/* Flags for descriptors */
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#define BAM_DESC_INT_FLAG (1 << 7)
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#define BAM_DESC_EOT_FLAG (1 << 6)
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#define BAM_DESC_EOB_FLAG (1 << 5)
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#define BAM_DESC_NWD_FLAG (1 << 4)
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#define BAM_DESC_CMD_FLAG (1 << 3)
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#define BAM_DESC_LOCK_FLAG (1 << 2)
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#define BAM_DESC_UNLOCK_FLAG (1 << 1)
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#define BAM_CE_REG_ADDR_MASK 0xFF000000
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#define BAM_CE_REG_MASK 0xFFFFFFFF
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#define BAM_CE_CMD_TYPE_SHIFT 24
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typedef unsigned long addr_t;
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static inline int ispow2(uint val)
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{
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return ((val - 1) & val) == 0;
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}
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/* Pipe Interrupt masks */
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enum p_int_type
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{
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P_PRCSD_DESC_EN_MASK = 1,
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P_OUT_OF_DESC_EN_MASK = (1 << 3),
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P_ERR_EN_MASK = (1 << 4),
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P_TRNSFR_END_EN_MASK = (1 << 5)
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};
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enum bam_ce_cmd_t{
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CE_WRITE_TYPE = 0,
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CE_READ_TYPE = 1
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};
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/* result type */
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typedef enum {
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BAM_RESULT_SUCCESS = 0,
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BAM_RESULT_FAILURE = 1,
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BAM_RESULT_TIMEOUT = 2
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} bam_result_t;
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/* Enum to define the BAM type:
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* BAM2BAM:Producer BAM to Consumer BAM.
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* SYS2BAM:Producer System to Consumer BAM.
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* BAM2SYS:Producer BAM to Consumer System.
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*/
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enum bam_transaction_type {
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SYS2BAM,
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BAM2SYS,
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BAM2BAM,
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};
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/* Enum to define BAM mode:
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* SPS:Use BAM pipes.
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* DIRECT:Pipes are disabled.
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* LEGACY:BAM is not used.
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*/
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enum bam_mode {
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SPS,
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DIRECT,
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LEGACY,
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};
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/* Enum to define BAM pipe states:
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* ENABLED:Producer and Consumer pipes are enabled.
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* HALT:Consumer pipe is halted. (Preferred type)
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* FULL_HALT:Both Producer and Consumer pipes are halted.
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*/
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enum bam_pipe_state {
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ENABLED,
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HALT,
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FULL_HALT,
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};
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enum bam_type {
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BAM_LITE,
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BAM,
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};
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/* Structure to define BAM descriptors that describe the data
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* descriptors written to the data FIFO.
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* addr:Descriptor address.
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* size:Each descriptor is 8 bytes. Size of the descriptor fifo must
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* contain an integer number of Descriptors.
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*/
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struct bam_desc {
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uint32_t addr;
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uint16_t size;
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uint8_t reserved;
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uint8_t flags;
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} __attribute__ ((packed));
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struct bam_desc_fifo {
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struct bam_desc *head;
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struct bam_desc *current;
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uint16_t size;
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uint16_t offset;
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};
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/* Structure to define BAM pipes
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* pipe_state: BAM pipe states.
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* trans_type: BAM tranaction type.
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* evt_gen_threshold: This register configures the threshold value for
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* Read/Write event generation by the BAM
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* towards another BAM.
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* fifo: Circular fifo associated with this pipe.
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* num_pipe: Number of pipes used in this bam.
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* pipe: Pipe number for this pipe.
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* spi_num: SPI number for the BAM interrupt.
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* int_mode: Specifies the pipe mode.
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* 1: Interrupt mode
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* 0: Polling mode
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*/
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struct bam_pipe {
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enum bam_pipe_state state;
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enum bam_transaction_type trans_type;
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struct bam_desc_fifo fifo;
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uint16_t evt_gen_threshold;
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uint8_t pipe_num;
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uint8_t spi_num;
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uint8_t int_mode;
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uint8_t initialized;
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uint8_t lock_grp;
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};
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/* Structure to define a BAM instance being used
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* base:Base address for the BAM.
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* type:BAM type.
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* mode:BAM mode.
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* pipe_pair:The pipe pairs to be used to access the BAM.
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* threshold:This Register holds a threshold value for the
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* counter summing the Size of the Descriptors Provided.
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* ee:Execution Environment for the BAM.
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* desc_len: Max desc length for the current BAM.
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*/
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struct bam_instance {
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uint32_t base;
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enum bam_type type;
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enum bam_mode mode;
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uint8_t num_of_pipes;
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struct bam_pipe pipe[4];
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uint16_t threshold;
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uint32_t ee;
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uint16_t max_desc_len;
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void (*callback)(int);
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};
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/* Command element(CE) structure*/
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struct cmd_element {
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uint32_t addr_n_cmd;
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uint32_t reg_data;
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uint32_t reg_mask;
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uint32_t reserve;
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} __attribute__ ((packed));
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void bam_init(struct bam_instance *bam);
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void bam_sys_pipe_init(struct bam_instance *bam,
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uint8_t pipe_num);
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int bam_pipe_fifo_init(struct bam_instance *bam,
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uint8_t pipe_num);
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struct cmd_element* bam_add_cmd_element(struct cmd_element *ptr,
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uint32_t addr,
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uint32_t data,
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enum bam_ce_cmd_t cmd_type);
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int bam_add_desc(struct bam_instance *bam,
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unsigned int pipe_num,
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unsigned char *data_ptr,
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unsigned int data_len,
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unsigned flags);
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int bam_add_one_desc(struct bam_instance *bam,
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unsigned int pipe_num,
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unsigned char*,
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uint32_t len,
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uint8_t flags);
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void bam_sys_gen_event(struct bam_instance *bam,
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uint8_t pipe_num,
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unsigned int num_desc);
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int bam_wait_for_interrupt(struct bam_instance *bam,
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uint8_t pipe_num,
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enum p_int_type interrupt);
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void bam_read_offset_update(struct bam_instance *bam, unsigned int pipe_num);
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void bam_pipe_reset(struct bam_instance *bam,
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uint8_t pipe_num);
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#endif
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