horia.geanta@freescale.com 3ef2412de6 drivers/crypto/fsl: fix snooping for write transactions ... HW coherency won't work properly for CAAM write transactions if AWCACHE is left to default (POR) value - 4'b0001. It has to be programmed to 4'b0010. For platforms that have HW coherency support: -PPC-based: the update has no effect; CAAM coherency already works due to the IOMMU (PAMU) driver setting the correct memory coherency attributes -ARM-based: the update fixes cache coherency issues, since IOMMU (SMMU) driver is not programmed to behave similar to PAMU Fixes: b9eebfade9 ("fsl_sec: Add hardware accelerated SHA256 and SHA1") Signed-off-by: Horia Geantă <horia.geanta@freescale.com> Reviewed-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>		2015-08-03 12:06:38 -07:00
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fsl	drivers/crypto/fsl: fix snooping for write transactions	2015-08-03 12:06:38 -07:00
rsa_mod_exp	rsa : Compile Modular Exponentiation files based on CONFIG_RSA_SOFTWARE_EXP	2015-03-05 12:04:59 -08:00
ace_sha.c	includes: move openssl headers to include/u-boot	2014-06-19 11:19:04 -04:00
ace_sha.h	drivers: crypto: ace_sha: add implementation of hardware based lib rand	2014-03-28 15:06:31 -04:00
Kconfig	DM: crypto/fsl - Add Freescale rsa DM driver	2015-01-29 17:09:58 -07:00
Makefile	DM: crypto/rsa_mod_exp: Add rsa Modular Exponentiation DM driver	2015-01-29 17:09:58 -07:00