Alexey Brodkin 379b3280b3 arc: cache - accommodate different L1 cache line lengths ... ARC core could be configured with different L1 and L2 (AKA SLC) cache line lengths. At least these values are possible and were really used: 32, 64 or 128 bytes. Current implementation requires cache line to be selected upon U-Boot configuration and then it will only work on matching hardware. Indeed this is quite efficient because cache line length gets hardcoded during code compilation. But OTOH it makes binary less portable. With this commit we allow U-Boot to determine real L1 cache line length early in runtime and use this value later on. This extends portability of U-Boot binary a lot. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>		2016-02-20 11:19:53 +03:00
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arc	arc: cache - accommodate different L1 cache line lengths	2016-02-20 11:19:53 +03:00
arm	ARM: tegra: enable USB device mode port on Dalmore	2016-02-18 10:02:19 -07:00
avr32
blackfin	Use correct spelling of "U-Boot"	2016-02-06 12:00:59 +01:00
m68k	m68k: M54418TWR: drop board/freescale/m54418twr/config.mk	2016-01-20 10:19:34 -05:00
microblaze	Use correct spelling of "U-Boot"	2016-02-06 12:00:59 +01:00
mips	Use correct spelling of "U-Boot"	2016-02-06 12:00:59 +01:00
nds32	Use correct spelling of "U-Boot"	2016-02-06 12:00:59 +01:00
nios2	nios2: set up the debug UART early	2016-02-06 15:14:25 +08:00
openrisc	openrisc: Fix build errors	2016-01-25 10:40:01 -05:00
powerpc	Remove unused CONFIG_MODEM_SUPPORT option and associated dead code.	2016-02-08 10:22:44 -05:00
sandbox	dm: video: test: Add tests for the video uclass	2016-01-20 19:10:16 -07:00
sh	Add more SPDX-License-Identifier tags	2016-01-19 08:31:21 -05:00
sparc	Use correct spelling of "U-Boot"	2016-02-06 12:00:59 +01:00
x86	Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging	2016-02-08 09:48:04 -05:00
.gitignore
Kconfig	MIPS: add initial infrastructure for device-tree files	2016-01-16 21:06:45 +01:00