Fabio Estevam cece262209 mx6: Fix reset cause for Power On Reset case ... After booting mx6qsabrelite from POR the following is reported: CPU: Freescale i.MX61 family rev1.0 at 792 MHz Reset cause: unknown reset This is because both the POR and WDOG bits are set after reset. Fix this by also checking both bits in the POR case. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>		2012-03-27 09:41:16 +02:00
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arm720t	Reduce build times	2011-11-03 20:44:58 +01:00
arm920t	usb: replace wait_ms() with mdelay()	2012-03-19 00:08:16 +01:00
arm925t	Reduce build times	2011-11-03 20:44:58 +01:00
arm926ejs	i.MX28: Enable additional DRAM address bits	2012-03-27 09:41:15 +02:00
arm946es	Reduce build times	2011-11-03 20:44:58 +01:00
arm1136	mx31: add "ARM11P power gating" to get_reset_cause	2012-03-27 09:41:15 +02:00
arm1176	Reduce build times	2011-11-03 20:44:58 +01:00
arm_intcm	Reduce build times	2011-11-03 20:44:58 +01:00
armv7	mx6: Fix reset cause for Power On Reset case	2012-03-27 09:41:16 +02:00
ixp	IXP: Squash warnings in IXP NPE	2012-03-26 23:09:26 +02:00
lh7a40x	Reduce build times	2011-11-03 20:44:58 +01:00
pxa	PXA: Fix missing get_tbclk() breaking vpac boards	2012-03-26 23:09:23 +02:00
s3c44b0	Reduce build times	2011-11-03 20:44:58 +01:00
sa1100	Reduce build times	2011-11-03 20:44:58 +01:00