Alexey Brodkin 6eb15e50f4 arc: add support for SLC (System Level Cache, AKA L2-cache) ... ARCv2 cores may have built-in SLC (System Level Cache, AKA L2-cache). This change adds functions required for controlling SLC: * slc_enable/disable * slc_flush/invalidate For now we just disable SLC to escape DMA coherency issues until either: * SLC flush/invalidate is supported in DMA APIin U-Boot * hardware DMA coherency is implemented (that might be board specific so probably we'll need to have a separate Kconfig option for controlling SLC explicitly) Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>		2015-04-03 09:47:50 +03:00
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asm	arc: add support for SLC (System Level Cache, AKA L2-cache)	2015-04-03 09:47:50 +03:00