mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2025-12-10 07:44:53 +01:00
This changes temporarily disable pcie Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org> Change-Id: I36b2f1563e6c4de928f5f4e5cd84afec94488221
219 lines
4.2 KiB
Text
219 lines
4.2 KiB
Text
/*
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* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "ipq9574-soc.dtsi"
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/ {
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model ="QCA, IPQ9574/DB-AL01-C1";
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compatible = "qca,ipq9574", "qca,ipq9574-db-al01-c1";
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machid = <0x1050000>;
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config_name = "config@db-al01-c1";
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aliases {
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console = "/serial@78B1000";
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uart2 = "/serial@78B2000";
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usb0 = "/xhci@8a00000";
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nand = "/nand-controller@79B0000";
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i2c0 = "/i2c@78BA000";
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};
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console: serial@78B1000 {
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status = "ok";
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serial_gpio {
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blsp1_uart2_rx {
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gpio = <34>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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drvstr = <GPIO_8MA>;
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od_en = <GPIO_OD_DISABLE>;
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};
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blsp1_uart2_tx {
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gpio = <35>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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drvstr = <GPIO_8MA>;
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od_en = <GPIO_OD_DISABLE>;
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};
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};
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};
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spi {
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spi_gpio {
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blsp0_spi_clk {
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gpio = <11>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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oe = <GPIO_OE_ENABLE>;
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drvstr = <GPIO_8MA>;
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};
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blsp0_spi_mosi {
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gpio = <14>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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oe = <GPIO_OE_ENABLE>;
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drvstr = <GPIO_8MA>;
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};
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blsp0_spi_miso {
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gpio = <13>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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drvstr = <GPIO_8MA>;
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};
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blsp0_spi_cs {
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gpio = <12>;
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func = <1>;
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oe = <GPIO_OE_ENABLE>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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i2c0: i2c@78BA000 {
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i2c_gpio {
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gpio1 {
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gpio = <48>;
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func = <1>;
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pull = <GPIO_PULL_UP>;
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drvstr = <GPIO_8MA>;
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oe = <GPIO_OE_ENABLE>;
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};
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gpio2 {
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gpio = <49>;
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func = <1>;
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pull = <GPIO_PULL_UP>;
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drvstr = <GPIO_8MA>;
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oe = <GPIO_OE_ENABLE>;
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};
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};
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};
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nand: nand-controller@79B0000 {
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status = "okay";
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nand_gpio {
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qspi_dat3 {
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gpio = <0>;
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func = <2>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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qspi_dat2 {
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gpio = <1>;
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func = <2>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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qspi_dat1 {
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gpio = <2>;
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func = <2>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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qspi_dat0 {
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gpio = <3>;
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func = <2>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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qspi_cs_n {
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gpio = <4>;
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func = <2>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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qspi_clk {
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gpio = <5>;
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func = <2>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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pci0: pci@20000000 {
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status = "ok";
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perst_gpio = <29>;
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pci_gpio {
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pci_rst {
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gpio = <29>;
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func = <0>;
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pull = <GPIO_PULL_DOWN>;
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oe = <GPIO_OD_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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pci1: pci@18000000 {
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status = "ok";
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perst_gpio = <32>;
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pci_gpio {
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pci_rst {
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gpio = <32>;
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func = <0>;
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pull = <GPIO_PULL_UP>;
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oe = <GPIO_OD_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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ess-switch {
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switch_mac_mode0 = <PORT_WRAPPER_PSGMII>;
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switch_mac_mode1 = <PORT_WRAPPER_USXGMII>;
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switch_mac_mode2 = <PORT_WRAPPER_SGMII_PLUS>;
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qca807x_gpio = <60>;
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qca807x_gpio_cnt = <1>;
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aquantia_gpio = <36>;
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aquantia_gpio_cnt = <1>;
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aquantia_port = <5>;
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aquantia_port_cnt = <1>;
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qca808x_gpio = <57>;
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qca808x_gpio_cnt = <1>;
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mdc_mdio_gpio = <38 39>;
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port_phyinfo {
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port@0 {
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phy_address = <16>;
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phy_type = <QCA807x_PHY_TYPE>;
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};
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port@1 {
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phy_address = <17>;
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phy_type = <QCA807x_PHY_TYPE>;
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};
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port@2 {
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phy_address = <18>;
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phy_type = <QCA807x_PHY_TYPE>;
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};
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port@3 {
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phy_address = <19>;
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phy_type = <QCA807x_PHY_TYPE>;
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};
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port@4 {
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phy_address = <8>;
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phy_type = <AQ_PHY_TYPE>;
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};
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port@5 {
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phy_address = <28>;
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phy_type = <QCA808x_PHY_TYPE>;
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};
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};
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};
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};
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