mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2025-12-10 07:44:53 +01:00
This changes add 4-Bit eMMC flash support Change-Id: Iad789ba44aaa0e11da5f8c16dd0a07d2e80de682 Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
297 lines
6 KiB
C
297 lines
6 KiB
C
/*
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* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
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*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <environment.h>
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#include <fdtdec.h>
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#include <asm/arch-qca-common/gpio.h>
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#include <asm/arch-qca-common/uart.h>
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#include <asm/arch-qca-common/scm.h>
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#include <asm/arch-qca-common/iomap.h>
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#include <devsoc.h>
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#ifdef CONFIG_QPIC_NAND
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#include <asm/arch-qca-common/qpic_nand.h>
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#include <nand.h>
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#endif
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#ifdef CONFIG_QCA_MMC
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#include <mmc.h>
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#include <sdhci.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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extern int ipq_spi_init(u16);
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const char *rsvd_node = "/reserved-memory";
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const char *del_node[] = {"uboot",
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"sbl",
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NULL};
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const add_node_t add_fdt_node[] = {{}};
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unsigned int qpic_frequency = 0, qpic_phase = 0;
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#ifdef CONFIG_QPIC_SERIAL
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extern unsigned int qpic_training_offset;
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#endif
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#ifdef CONFIG_QCA_MMC
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struct sdhci_host mmc_host;
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#endif
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void qca_serial_init(struct ipq_serial_platdata *plat)
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{
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int ret;
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if (plat->gpio_node >= 0) {
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qca_gpio_init(plat->gpio_node);
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}
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plat->port_id = UART_PORT_ID(plat->reg_base);
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ret = uart_clock_config(plat);
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if (ret)
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printf("UART clock config failed %d\n", ret);
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return;
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}
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void reset_board(void)
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{
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run_command("reset", 0);
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}
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/*
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* Set the uuid in bootargs variable for mounting rootfilesystem
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*/
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#ifdef CONFIG_QCA_MMC
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int set_uuid_bootargs(char *boot_args, char *part_name, int buflen,
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bool gpt_flag)
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{
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int ret, len;
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block_dev_desc_t *blk_dev;
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disk_partition_t disk_info;
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blk_dev = mmc_get_dev(mmc_host.dev_num);
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if (!blk_dev) {
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printf("Invalid block device name\n");
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return -EINVAL;
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}
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if (buflen <= 0 || buflen > MAX_BOOT_ARGS_SIZE)
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return -EINVAL;
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#ifdef CONFIG_PARTITION_UUIDS
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ret = get_partition_info_efi_by_name(blk_dev,
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part_name, &disk_info);
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if (ret) {
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printf("bootipq: unsupported partition name %s\n",part_name);
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return -EINVAL;
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}
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if ((len = strlcpy(boot_args, "root=PARTUUID=", buflen)) >= buflen)
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return -EINVAL;
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#else
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if ((len = strlcpy(boot_args, "rootfsname=", buflen)) >= buflen)
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return -EINVAL;
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#endif
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boot_args += len;
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buflen -= len;
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#ifdef CONFIG_PARTITION_UUIDS
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if ((len = strlcpy(boot_args, disk_info.uuid, buflen)) >= buflen)
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return -EINVAL;
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#else
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if ((len = strlcpy(boot_args, part_name, buflen)) >= buflen)
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return -EINVAL;
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#endif
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boot_args += len;
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buflen -= len;
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if (gpt_flag && strlcpy(boot_args, " gpt", buflen) >= buflen)
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return -EINVAL;
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return 0;
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}
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#else
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int set_uuid_bootargs(char *boot_args, char *part_name, int buflen,
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bool gpt_flag)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_QCA_MMC
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void mmc_iopad_config(struct sdhci_host *host)
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{
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u32 val;
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val = sdhci_readb(host, SDHCI_VENDOR_IOPAD);
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/*set bit 15 & 16*/
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val |= 0x18000;
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writel(val, host->ioaddr + SDHCI_VENDOR_IOPAD);
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}
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void sdhci_bus_pwr_off(struct sdhci_host *host)
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{
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u32 val;
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val = sdhci_readb(host, SDHCI_HOST_CONTROL);
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sdhci_writeb(host,(val & (~SDHCI_POWER_ON)), SDHCI_POWER_CONTROL);
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}
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__weak void board_mmc_deinit(void)
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{
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/*since we do not have misc register in devsoc
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* so simply return from this function
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*/
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return;
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}
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int board_mmc_init(bd_t *bis)
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{
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int node, gpio_node;
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int ret = 0;
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qca_smem_flash_info_t *sfi = &qca_smem_flash_info;
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node = fdt_path_offset(gd->fdt_blob, "mmc");
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if (node < 0) {
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printf("sdhci: Node Not found, skipping initialization\n");
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return -1;
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}
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gpio_node = fdt_subnode_offset(gd->fdt_blob, node, "mmc_gpio");
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if (node >= 0)
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qca_gpio_init(gpio_node);
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mmc_host.ioaddr = (void *)MSM_SDC1_SDHCI_BASE;
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mmc_host.voltages = MMC_VDD_165_195;
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mmc_host.version = SDHCI_SPEC_300;
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mmc_host.cfg.part_type = PART_TYPE_EFI;
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mmc_host.quirks = SDHCI_QUIRK_BROKEN_VOLTAGE;
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emmc_clock_reset();
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udelay(10);
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emmc_clock_init();
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if (add_sdhci(&mmc_host, 200000000, 400000)) {
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printf("add_sdhci fail!\n");
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return -1;
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}
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if (!ret && sfi->flash_type == SMEM_BOOT_MMC_FLASH) {
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ret = board_mmc_env_init(mmc_host);
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}
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return ret;
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}
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#else
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int board_mmc_init(bd_t *bis)
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{
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return 0;
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}
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#endif
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__weak int ipq_get_tz_version(char *version_name, int buf_size)
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{
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return 1;
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}
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int apps_iscrashed(void)
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{
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return 0;
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}
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void reset_crashdump(void)
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{
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return;
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}
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void psci_sys_reset(void)
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{
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return;
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}
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void qti_scm_pshold(void)
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{
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return;
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}
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void reset_cpu(unsigned long a)
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{
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reset_crashdump();
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if (is_scm_armv8()) {
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psci_sys_reset();
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} else {
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qti_scm_pshold();
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}
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while(1);
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}
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void board_nand_init(void)
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{
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#ifdef CONFIG_QPIC_SERIAL
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/* check for nand node in dts
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* if nand node in dts is disabled then
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* simply return from here without
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* initializing
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*/
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int node;
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node = fdt_path_offset(gd->fdt_blob, "/nand-controller");
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if (!fdtdec_get_is_enabled(gd->fdt_blob, node)) {
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printf("QPIC: disabled, skipping initialization\n");
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} else {
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qpic_nand_init(NULL);
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}
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#endif
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#ifdef CONFIG_QCA_SPI
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int gpio_node;
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gpio_node = fdt_path_offset(gd->fdt_blob, "/spi/spi_gpio");
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if (gpio_node >= 0) {
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qca_gpio_init(gpio_node);
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#ifdef CONFIG_MTD_DEVICE
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ipq_spi_init(CONFIG_IPQ_SPI_NOR_INFO_IDX);
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#endif
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}
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#endif
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}
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void enable_caches(void)
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{
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qca_smem_flash_info_t *sfi = &qca_smem_flash_info;
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smem_get_boot_flash(&sfi->flash_type,
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&sfi->flash_index,
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&sfi->flash_chip_select,
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&sfi->flash_block_size,
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&sfi->flash_density);
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icache_enable();
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/*Skips dcache_enable during JTAG recovery */
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if (sfi->flash_type)
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dcache_enable();
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}
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void disable_caches(void)
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{
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icache_disable();
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dcache_disable();
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}
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unsigned long timer_read_counter(void)
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{
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return 0;
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}
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void set_flash_secondary_type(qca_smem_flash_info_t *smem)
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{
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return;
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};
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