Minghuan Lian 1d0b59a9b0 fsl/pci: Set CFG_READY for PCIe v3.0 and later ... Freescale PCIe controllers v3.0 and later need to set bit CFG_READY to allow all inbound configuration transactions to be processed normally when in EP mode. However, bit CFG_READY has been moved from PCIe configuration space to CCSR PCIe configuration register comparing previous version. The patch is to set this bit according to PCIe version. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>		2015-05-04 09:24:23 -07:00
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cpu	powerpc/t4rdb: Add SD boot support for T4240RDB board	2015-05-04 09:24:04 -07:00
dts	powerpc: ppc4xx: Add defaults for DT based booting to really work	2015-02-12 10:35:32 -07:00
include/asm	fsl/pci: Set CFG_READY for PCIe v3.0 and later	2015-05-04 09:24:23 -07:00
lib	net: Remove the bd* parameter from net stack functions	2015-04-18 11:11:11 -06:00
config.mk	generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig	2015-03-28 09:03:08 -04:00
Kconfig	powerpc: 74xx_7xx: remove 74xx_7xx cpu support	2015-01-16 10:24:39 -05:00
Makefile	Kbuild: introduce Makefile in arch/$ARCH/	2014-12-08 09:35:45 -05:00