York Sun 19601dd99c driver/ddr/fsl: Update DDR4 RTT values ... DDR4 has different RTT value and code according to JEDEC spec. Update the macros and options . Signed-off-by: York Sun <yorksun@freescale.com>		2015-12-13 18:27:27 -08:00
..
altera	ddr: altera: Repair uninited variable	2015-08-23 11:56:19 +02:00
fsl	driver/ddr/fsl: Update DDR4 RTT values	2015-12-13 18:27:27 -08:00
marvell	arm: mvebu: Fix SAR1_CPU_CORE_MASK	2015-11-17 23:41:41 +01:00