Stefan Reinauer 17de114f9f x86: Clean up MTRR 7 right before jumping to the kernel ... This cleans up the rom caching optimization implemented in coreboot (and needed throughout U-Boot runtime). Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>		2012-12-06 14:30:39 -08:00
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asm-offsets.c	x86: Initial commit for running as a coreboot payload	2011-12-19 13:26:15 +11:00
coreboot.c	x86: Clean up MTRR 7 right before jumping to the kernel	2012-12-06 14:30:39 -08:00
coreboot_car.S	x86: Initial commit for running as a coreboot payload	2011-12-19 13:26:15 +11:00
ipchecksum.c	x86: Import code from coreboot's libpayload to parse the coreboot table	2011-12-19 13:26:15 +11:00
Makefile	x86: Enable coreboot timestamp facility support in u-boot.	2012-12-06 14:30:38 -08:00
pci.c	x86: coreboot: Implement recursively scanning PCI busses	2012-11-28 11:40:05 -08:00
sdram.c	x86: Fill in the dram info using the e820 map on coreboot/x86	2012-12-06 14:30:39 -08:00
tables.c	x86: coreboot: Decode additional coreboot sysinfo tags	2012-11-30 13:44:03 -08:00
timestamp.c	x86: Enable coreboot timestamp facility support in u-boot.	2012-12-06 14:30:38 -08:00