Commit graph

9 commits

Author SHA1 Message Date
Ajay Kishore
3522095242 ipq806x: Initialize TLV and CPU context dump size
This patch initialize TLV and CPU context dump size,
required for crashdump collection in flash.

Change-Id: I960300c3ea6c97481a7c5fd551b648454c13deef
Signed-off-by: Ajay Kishore <akisho@codeaurora.org>
2016-11-23 06:42:52 -08:00
Ajay Kishore
db05c5974f ipq806x: Added support for I2C diagnostics
Change-Id: I1287a66b25e437cd29feb755c034407ea1555ca5
Signed-off-by: Ajay Kishore <akisho@codeaurora.org>
2016-11-16 12:21:11 +05:30
Aditya Kumar Patra S
85671fbdd2 qca: ipq806x: Moved clock.c to driver/clk/ location.
Change-Id: Ib4246f2fbe0ab0085827833b93c71835255c5361
Signed-off-by: Aditya Kumar Patra S <apatr@codeaurora.org>
2016-10-07 01:41:38 -07:00
Akila N
4f8a66afca ipq40xx: Move clock.c to drivers/clk
Change-Id: I11cdfe5f9ca52b928cd9fb7cc358b3592512161a
Signed-off-by: Akila N <akilan@codeaurora.org>
2016-08-30 15:27:03 +05:30
huang lin
3f2ef13924 rockchip: rk3036: Add clock driver
Add a driver for setting up and modifying the various PLLs, peripheral
clocks and mmc clocks on RK3036

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
Simon Glass
99c1565082 rockchip: rk3288: Add clock driver
Add a driver for setting up and modifying the various PLLs and peripheral
clocks on the RK3288.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02 21:28:23 -06:00
Masahiro Yamada
0543589118 clk: rename CONFIG_SPL_CLK_SUPPORT to CONFIG_SPL_CLK
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:01 -04:00
Simon Glass
6a1c7cef14 dm: test: Add tests for the clk uclass
Add tests of each API call using a sandbox clock device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:30 -06:00
Simon Glass
f26c8a8e77 dm: Add a clock uclass
Clocks are an important feature of platforms and have become increasing
complex with time. Most modern SoCs have multiple PLLs and dozens of clock
dividers which distribute clocks to on-chip peripherals.

Some SoC implementations have a clock API which is private to that SoC family,
e.g. Tegra and Exynos. This is useful but it would be better to have a
common API that can be understood and used throughout U-Boot.

Add a simple clock API as a starting point. It supports querying and setting
the rate of a clock. Each clock is a device. To reduce memory and processing
overhead the concept of peripheral clocks is provided. These do not need to
be explicit devices - it is possible to write a driver that can adjust the
I2C clock (for example) without an explicit I2C clock device. This can
dramatically reduce the number of devices (and associated overhead) in a
complex SoC.

Clocks are referenced by a number, and it is expected that SoCs will define
that numbering themselves via an enum.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:29 -06:00