4 commits

Author	SHA1	Message	Date
Grzegorz Bernacki	7f19139389	[PPC440SPe] Improve PCIe configuration space access ... - correct configuration space mapping - correct bus numbering - better access to config space Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the first device on the first bus. We now allow to configure up to 16 buses; also, scanning for devices behind the PCIe-PCIe bridge is supported, so peripheral devices farther in hierarchy can be identified. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>	2007-09-07 18:20:23 +02:00
Stefan Roese	a65c5768e5	ppc4xx: Change SysACE address on Katmai ... With this new base address of the Xilinx SystemACE controller the Linux driver will be easier to adapt, since it can now be mapped via the "normal" ioremap() call. Signed-off-by: Stefan Roese <sr@denx.de>	2007-04-02 10:09:30 +02:00
Stefan Roese	2721a68a9e	ppc4xx: Small AMCC Katmai 440SPe update ... Signed-off-by: Stefan Roese <sr@denx.de>	2007-03-08 10:07:18 +01:00
Stefan Roese	4745acaa1a	[PATCH] Add support for the AMCC Katmai (440SPe) eval board ... Signed-off-by: Stefan Roese <sr@denx.de>	2007-02-20 10:57:08 +01:00