Commit graph

11561 commits

Author SHA1 Message Date
Álvaro Fernández Rojas
02bb1fa09e mips: bmips: add bcm6345-rst driver support for BCM63268
This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
78118211fb mips: bmips: add bcm6345-rst driver support for BCM6328
This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
efe8b9d012 mips: bmips: add bcm6345-rst driver support for BCM6358
This driver can control up to 32 resets.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
969ebdb930 mips: bmips: add bcm6345-clk driver support for BCM63268
This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
5b14e13c24 mips: bmips: add bcm6345-clk driver support for BCM6328
This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
70789bd2a5 mips: bmips: add bcm6345-clk driver support for BCM6358
This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
a186d2630b mips: bmips: add NeufBox 4 (Sercomm) board
This serves as an example for bcm6358-leds.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
4d6a519c68 mips: bmips: add bcm6358-led driver support for BCM6358
This driver can control up to 32 serial leds.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
09e2a57150 mips: bmips: add Comtrend VR-3032u bcm6328-leds
This board has several LEDs attached to its BCM6328 led controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
6def1b24d5 mips: bmips: add Comtrend AR-5387un bcm6328-leds
This board has several LEDs attached to its BCM6328 led controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
65a7c955fa mips: bmips: add bcm6328-led driver support for BCM63268
This driver can control up to 24 LEDs and supports HW blinking and serial leds.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
e0f1fd2b37 mips: bmips: add bcm6328-led driver support for BCM6328
This driver can control up to 24 LEDs and supports HW blinking and serial leds.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
2791f8db5e mips: bmips: add Huawei HG556a gpio-leds
This board has several LEDs attached to gpio0.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
c9c94d5d7e mips: bmips: add bcm6345-gpio driver support for BCM63268
This SoC has one gpio bank divided into two 32 bit registers, with a total of
52 GPIOs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
320186f476 mips: bmips: add bcm6345-gpio driver support for BCM6328
This SoC has one gpio bank with a total of 32 GPIOs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
2507f69c41 mips: bmips: add bcm6345-gpio driver support for BCM6358
This SoC has one gpio bank divided into two 32 bit registers, with a total of
40 GPIOs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
77ca99d1a0 MIPS: add BMIPS Comtrend VR-3032u board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
6a235bb87b MIPS: add support for Broadcom MIPS BCM63268 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
0642f485dc MIPS: add BMIPS Comtrend AR-5387un board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
6471a225e7 MIPS: add support for Broadcom MIPS BCM6328 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
4a2b2724a2 MIPS: add BMIPS Huawei HG556a board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
e30d2bd40e MIPS: add support for Broadcom MIPS BCM6358 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
ee422142f4 MIPS: add initial infrastructure for Broadcom MIPS SoCs
CFE checks CPU Thread in a different way (using register $22):
mfc0	t1, C0_BCM_CONFIG, 3 # $22
li	t2, CP0_CMT_TPID # (1 << 31)
and	t1, t2
bnez	t1, 2f	# if we are running on thread 1, skip init
nop

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
5e36546c53 MIPS: allow using generic sysreset drivers
Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00
Daniel Schwierzeck
0d159d6852 MIPS: call debug_uart_init right before board_init_f
All MIPS boards that support debug uart are calling debug_uart_init right at
the beginning of board_early_init_f.
Instead of doing that, let's provide a generic call to debug_uart_init right
before the call to board_init_f if debug uart is enabled for boards without
stack in SRAM.
On the other hand, boards with stack in SRAM can call earlier (right before
low level init).

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
47cf465c25 MIPS: add support for generating u-boot.elf
Define PLATFORM_ELFFLAGS for MIPS in order to be able to generate u-boot.elf

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2017-05-10 16:16:09 +02:00
Álvaro Fernández Rojas
d57259b950 u-boot.elf: remove hard-coded arm64 flags
This is needed in order to allow building it for other archs.
Move relocation comment to a better place.
Remove no longer needed dts FIXME.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-10 16:16:09 +02:00
Tom Rini
dd9999d5f4 Merge git://git.denx.de/u-boot-dm 2017-05-09 16:11:36 -04:00
Tom Rini
a284212963 Merge git://www.denx.de/git/u-boot-marvell 2017-05-09 15:48:09 -04:00
Jean-Jacques Hiblot
33a5e2c5e7 dra7: dtsi: mark ocp2scp bus compatible with "simple-bus"
This is needed to probe devices under that bus such as the SATA PHY.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:16 -06:00
Jean-Jacques Hiblot
86322f5982 dm: test: Add tests for the generic PHY uclass
Those tests check:
- the ability for a phy-user to get a phy based on its name or its index
- the ability of a phy device (provider) to manage multiple ports
- the ability to perform operations on the phy (init,deinit,on,off)
- the behavior of the uclass when optional operations are not implemented

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:16 -06:00
Wenyou Yang
6cb2a7fe81 ARM: dts: at91: Add dts files for at91sam9263ek
The device tree source files of at91sam9263ek boards are copied from
the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
   in board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
1e315a356b ARM: dts: at91: Add dts files for at91sam9rlek
The device tree source files of at91sam9rlek boards are copied from
the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
   in board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
627e41f125 ARM: dts: at91: Add dts files for at91sam9260ek/9g20ek
The device tree source files of at91sam9g20ek and at91sam9260ek
boards are copied from the Linux v4.10, do the changes below.
 - Fix the build error for the usb0 node.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
   in board_init_f stage.
 - Add the clk pinctrl of the mmc0 node.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
eb6f87cc07 ARM: dts: at91: Add dts files for at91sam9m10g45ek
The device tree source files of at91sam9m10g45ek boards are copied
from the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
cd339347b9 ARM: dts: at91: Add dts files for at91sam9n12ek
The device tree source files of at91sam9n12ek boards are copied from
the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Change the compatible of the spi flash to "spi-flash".
 - Add the spi0 aliases.
 - Fix the pinctrl-names of mmc0 node.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
25e88d406e ARM: dts: at91: Add dts files for at91sam9x5ek
The device tree source files of at91sam9x5ek board are copied from
the Linux v4.10, do the changes below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Change the compatible of the spi flash to "spi-flash".
 - Add the spi0 aliases.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
0d00f9b6c1 board: sama5d4ek: fix DD2 configuration
Fix the DDR2 configuration to make SPL work.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-05-09 12:14:15 -06:00
Wenyou Yang
4529ee3bc5 ARM: dts: sama5d2_xplained: update for SPL
Add the "u-boot,dm-pre-reloc" property to determine which nodes
which are needed by SPL and by the board_init_f stage.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-05-09 12:14:15 -06:00
Wenyou Yang
20bb165c1f ARM: dts: sama5d2: add clock property for uart1 node
Add clock property for uart1 node.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-05-09 12:14:15 -06:00
Chris Packham
e38f5fc8d8 ARM: mvebu: switch db-88f6820-amc to DM for i2c
Move existing configuration from header file to defconfig or dts as
appropriate.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Stefan Roese
fdc9e88088 fix: phy: marvell: cp110: update comphy selector option
Align PHY selectors register with Armada-CP-110 functional SPEC
update all relevant device trees with this change.

Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Stefan Roese
e89acc4bf1 phy: marvell: cp110: update utmi phy connection type
UTMI_PHY_TO_USB_HOST was used in USB3 UTMI dts node only, but there will
be USB2 UTMI dts node for some SoCs that have got USB2 controller, so rename
TO_USB_HOST to TO_USB3_HOST to distinguish TO_USB2_HOST in later on patches.

Signed-off-by: zachary <zhangzg@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Stefan Roese
cb686454c7 phy: marvell: Replace PHY_TYPE_KR with PHY_TYPE_SFI
Use correct naming as done in the latest Marvell U-Boot version as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Uwe Kleine-König
d374e90b27 arm: mvebu: Minor fixes in the AXP / A38x SERDES code
- Fix spelling error of SERDES_VERSION
- Remove superfluous definition of this macro
- Remove unnecessary include of i2c.h

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Konstantin Porotchkin
50eacd8eb1 arm64: a8k: dts: Add support for NAND devices on A8K platform
Add NAND to CP master device tree. Add armada-7040-db-nand
device tree for the board configured with NAND boot device.
Add comment about boot device ID to armada-7040-db DTS.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Konstantin Porotchkin
a2cb55938f arm64: mvebu: a8k: Add support for NAND clock get
Implement mvebu_get_nand_clock call for A8K family.
This function is used by PXA3XX NAND driver.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Konstantin Porotchkin
f4f194e864 arm64: mvebu: Trigger PCI devices scan at early init stage
Add PCIe initialization at early init stage.
This operation has a side effect of detecting all PCIe
plug-in cards, so the operator is not obligated to issue
"pci enum" command though CLI for this purpose.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Konstantin Porotchkin
0f712f2c8d mvebu: dts: a80x0: Sync the DB DTS with standard config A
Sync the default configuration of Armada-8040-DB with
Marvell u-boot-2015  standard configuration "A" for the same board.
The standard configuration "A" enables 2 PCIe slots on CP0
and 3 PCIe slots on CP1.
This is the main configuration used for u-boot  and Linux tests.
This patch also re-arranges the DTS file entries by grouping
all nodes related to CP0 and CP1.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Cooper Jr., Franklin
1743d040b1 ARM: keystone: Enable DM_I2C by default
Enable by default DM_I2C for all Texas Instruments Keystone 2 based
evms.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-05-09 09:05:13 +02:00