From 5d7818d7fe1c9390612ecce77af67e29b1e6ad70 Mon Sep 17 00:00:00 2001 From: Vandhiadevan Karunamoorthy Date: Mon, 19 Jul 2021 23:57:06 +0530 Subject: [PATCH] ipq9574: USB clock update Signed-off-by: Vandhiadevan Karunamoorthy Change-Id: I5193a74629fd49c297820f88fb49ad062b5e0603 --- arch/arm/include/asm/arch-ipq9574/clk.h | 12 +++++++----- board/qca/arm/ipq9574/clock.c | 8 ++++++-- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/arch-ipq9574/clk.h b/arch/arm/include/asm/arch-ipq9574/clk.h index 632a3d97cb..ba87db33c8 100644 --- a/arch/arm/include/asm/arch-ipq9574/clk.h +++ b/arch/arm/include/asm/arch-ipq9574/clk.h @@ -142,6 +142,8 @@ void i2c_clock_config(void); #define GCC_USB0_PHY_BCR 0x182C06C #define GCC_USB3PHY_0_PHY_BCR 0x182C070 #define GCC_USB0_PHY_PIPE_MISC 0x182C074 +#define GCC_SNOC_USB_CBCR 0x182E058 +#define GCC_ANOC_USB_AXI_CBCR 0x182E084 #define AUX_M 0x0 #define AUX_N 0x0 @@ -149,12 +151,12 @@ void i2c_clock_config(void); #define SW_COLLAPSE_ENABLE (1 << 0) #define SW_OVERRIDE_ENABLE (1 << 2) #define GCC_USB0_MASTER_CFG_RCGR_SRC_SEL (1 << 8) -#define GCC_USB0_MASTER_CFG_RCGR_SRC_DIV (0xb << 0) -#define GCC_USB_MOCK_UTMI_SRC_SEL (0 << 8) -#define GCC_USB_MOCK_UTMI_SRC_DIV (1 << 0) +#define GCC_USB0_MASTER_CFG_RCGR_SRC_DIV (0x7 << 0) +#define GCC_USB_MOCK_UTMI_SRC_SEL (1 << 8) +#define GCC_USB_MOCK_UTMI_SRC_DIV (0x13 << 0) #define UTMI_M 0x1 -#define UTMI_N 0xf7 -#define UTMI_D 0xf6 +#define UTMI_N 0xFFFE +#define UTMI_D 0xFFFD #define GCC_USB0_AUX_CFG_MODE_DUAL_EDGE (2 << 12) #define GCC_USB0_AUX_CFG_SRC_SEL (0 << 8) #define GCC_USB0_AUX_CFG_SRC_DIV (0 << 0) diff --git a/board/qca/arm/ipq9574/clock.c b/board/qca/arm/ipq9574/clock.c index e0cc9f8299..adbf30771d 100644 --- a/board/qca/arm/ipq9574/clock.c +++ b/board/qca/arm/ipq9574/clock.c @@ -295,11 +295,13 @@ void usb_clock_init(int id) /* Configure CBCRs */ writel((readl(GCC_USB0_MASTER_CBCR) | CLK_ENABLE), GCC_USB0_MASTER_CBCR); - writel(CLK_ENABLE, GCC_USB0_SLEEP_CBCR); + writel(CLK_ENABLE, GCC_ANOC_USB_AXI_CBCR); + writel(CLK_ENABLE, GCC_SNOC_USB_CBCR); writel(CLK_ENABLE, GCC_USB0_MOCK_UTMI_CBCR); + writel(CLK_ENABLE, GCC_USB0_SLEEP_CBCR); + writel(CLK_ENABLE, GCC_USB0_AUX_CBCR); writel((CLK_ENABLE | NOC_HANDSHAKE_FSM_EN), GCC_USB0_PHY_CFG_AHB_CBCR); - writel(CLK_ENABLE, GCC_USB0_AUX_CBCR); writel(CLK_ENABLE, GCC_USB0_PIPE_CBCR); #endif } @@ -314,6 +316,8 @@ void usb_clock_deinit(void) writel(0, GCC_USB0_SLEEP_CBCR); writel(0, GCC_USB0_MOCK_UTMI_CBCR); writel(0, GCC_USB0_AUX_CBCR); + writel(0, GCC_ANOC_USB_AXI_CBCR); + writel(0, GCC_SNOC_USB_CBCR); #endif } #endif