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powerpc/t104x, t102x: Update CPC debug register value in PBI commands

Browse source 
Update PBI command in pbi_cfg files to keep register bit
to default reset value while configuring CPC
as SRAM

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Priyanka Jain 2015-05-07 14:24:31 +05:30 • committed by York Sun
parent f57709ab18
commit fa9ccff835
4 changed files with 4 additions and 4 deletions
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2
board/freescale/t102xqds/t1024_pbi.cfg
View file

@ -6,7 +6,7 @@
#Configure CPC1 as 256KB SRAM
09010100 00000000
09010104 fffc0007
09010f00 08000000
09010f00 081e000d
09010000 80000000
#Configure LAW for CPC1
09000cd0 00000000

2
board/freescale/t102xrdb/t1024_pbi.cfg
View file

@ -6,7 +6,7 @@
#Configure CPC1 as 256KB SRAM
09010100 00000000
09010104 fffc0007
09010f00 08000000
09010f00 081e000d
09010000 80000000
#Configure LAW for CPC1
09000cd0 00000000

2
board/freescale/t1040qds/t1040_pbi.cfg
View file

@ -6,7 +6,7 @@
#Configure CPC1 as 256KB SRAM
09010100 00000000
09010104 fffc0007
09010f00 08000000
09010f00 081e000d
09010000 80000000
#Configure LAW for CPC1
09000cf0 00000000

2
board/freescale/t104xrdb/t104x_pbi.cfg
View file

@ -16,7 +16,7 @@
#Configure CPC1 as 256KB SRAM
09010100 00000000
09010104 fffc0007
09010f00 08000000
09010f00 081e000d
09010000 80000000
#Configure LAW for CPC1
09000cd0 00000000