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qca: Made IPQ806x specific changes to common boardinit and bootipq files.

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1. Modified common bootipq command file to support IPQ806x.
    2. Modified common board initialization file to support IPQ806x.

Change-Id: I1fdd93037b885eefea0c5ddede9436861dd485b3
Signed-off-by: Aditya Kumar Patra S <apatr@codeaurora.org>
This commit is contained in:
Aditya Kumar Patra S 2016-09-20 18:48:58 +05:30
parent db8cc686a2
commit f8b348e00b
11 changed files with 125 additions and 68 deletions
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1
arch/arm/include/asm/arch-qcom-common/scm.h
View file

@ -28,7 +28,6 @@
#define SCM_SVC_RD 0x12
#define QFPROM_IS_AUTHENTICATE_CMD 0x7
#define KERNEL_AUTH_CMD 0x13
#define CE_CHN_SWITCH_CMD 0x2
#define SCM_EBUSY -6

12
board/qca/common/board_init.c
View file

@ -54,10 +54,6 @@ int board_init(void)
&sfi->flash_chip_select,
&sfi->flash_block_size,
&sfi->flash_density);
if (ret < 0) {
printf("cdp: get boot flash failed\n");
return ret;
}
/*
* Should be inited, before env_relocate() is called,
@ -70,12 +66,14 @@ int board_init(void)
return ret;
}
}
#ifndef CONFIG_ENV_IS_NOWHERE
switch (sfi->flash_type) {
case SMEM_BOOT_NAND_FLASH:
nand_env_device = CONFIG_QPIC_NAND_NAND_INFO_IDX;
nand_env_device = CONFIG_NAND_FLASH_INFO_IDX;
break;
case SMEM_BOOT_SPI_FLASH:
nand_env_device = CONFIG_IPQ_SPI_NOR_INFO_IDX;
nand_env_device = CONFIG_SPI_FLASH_INFO_IDX;
break;
case SMEM_BOOT_MMC_FLASH:
break;
@ -125,6 +123,8 @@ int board_init(void)
env_name_spec = mmc_env_name_spec;
#endif
}
#endif
return 0;
}

26
board/qca/common/cmd_bootqca.c
View file

@ -61,6 +61,8 @@ typedef struct {
kernel_img_info_t kernel_img_info;
char dtb_config_name[64];
static int do_dumpqca_data(cmd_tbl_t *cmdtp, int flag, int argc,
char *const argv[])
{
@ -154,9 +156,10 @@ static int set_fs_bootargs(int *fs_on_nand)
*fs_on_nand = 1;
fdt_setprop(gd->fdt_blob, 0, "nor_nand_available", fs_on_nand, sizeof(int));
snprintf(mtdids, sizeof(mtdids),
"nand%d=nand%d,nand2=spi0.0",
"nand%d=nand%d,nand%d=spi0.0",
is_spi_nand_available(),
is_spi_nand_available()
is_spi_nand_available(),
CONFIG_SPI_FLASH_INFO_IDX
);
if (getenv("fsbootargs") == NULL)
@ -174,7 +177,7 @@ static int set_fs_bootargs(int *fs_on_nand)
}
*fs_on_nand = 0;
snprintf(mtdids, sizeof(mtdids), "nand2=spi0.0");
snprintf(mtdids, sizeof(mtdids), "nand%d=spi0.0", CONFIG_SPI_FLASH_INFO_IDX);
if (getenv("fsbootargs") == NULL)
setenv("fsbootargs", bootargs);
@ -221,10 +224,19 @@ int config_select(unsigned int addr, char *rcmd, int rcmd_size)
* or board name based config is used.
*/
int soc_version = 0;
const char *config = fdt_getprop(gd->fdt_blob, 0, "config_name", NULL);
sprintf((char *)dtb_config_name, "%s", config);
ipq_smem_get_socinfo_version((uint32_t *)&soc_version);
if(SOCINFO_VERSION_MAJOR(soc_version) >= 2) {
sprintf((char *)dtb_config_name, "v%d.0-%s",
SOCINFO_VERSION_MAJOR(soc_version), dtb_config_name);
}
if (fit_conf_get_node((void *)addr, config) >= 0) {
snprintf(rcmd, rcmd_size, "bootm 0x%x#%s\n", addr, config);
snprintf(rcmd, rcmd_size, "bootm 0x%x#%s\n", addr, dtb_config_name);
return 0;
}
printf("Config not availabale\n");
@ -284,9 +296,11 @@ static int do_boot_signedimg(cmd_tbl_t *cmdtp, int flag, int argc, char *const a
/* check the smem info to see which flash used for booting */
if (sfi->flash_type == SMEM_BOOT_SPI_FLASH) {
if (debug) {
printf("Using nand device 2\n");
printf("Using nand device %d\n", CONFIG_SPI_FLASH_INFO_IDX);
}
run_command("nand device 2", 0);
sprintf(runcmd, "nand device %d", CONFIG_SPI_FLASH_INFO_IDX);
run_command(runcmd, 0);
} else if (sfi->flash_type == SMEM_BOOT_NAND_FLASH) {
if (debug) {
printf("Using nand device 0\n");

3
board/qca/ipq40xx/ipq40xx.h
View file

@ -26,6 +26,9 @@
#endif
#define MAX_CONF_NAME 5
#define GCC_BLSP1_UART1_APPS_CBCR 0x0180203c
#define KERNEL_AUTH_CMD 0x13
unsigned int smem_get_board_machtype(void);
extern qca_mmc mmc_host;

32
board/qca/ipq806x/ipq806x.c
View file

@ -17,6 +17,7 @@
#include <environment.h>
#include <asm/arch-qcom-common/gsbi.h>
#include <asm/arch-qcom-common/uart.h>
#include <asm/arch-qcom-common/gpio.h>
#include "ipq806x.h"
#include "qca_common.h"
@ -24,33 +25,16 @@ DECLARE_GLOBAL_DATA_PTR;
qca_mmc mmc_host;
void enable_caches(void)
{
icache_enable();
}
void disable_caches(void)
{
icache_disable();
}
int board_init(void)
{
return 0;
}
int dram_init(void)
{
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
unsigned long timer_read_counter(void)
{
return 0;
}
void reset_crashdump(void)
{
return;
}
void reset_cpu(unsigned long a)
{
while(1);
@ -71,6 +55,10 @@ int board_mmc_init(bd_t *bis)
return ret;
}
void board_nand_init(void)
{
/* TODO: To be filled */
}
void qca_serial_init(struct ipq_serial_platdata *plat)
{
int serial_node, gpio_node;

3
board/qca/ipq806x/ipq806x.h
View file

@ -19,6 +19,8 @@
#define GSBI4_BASE 0x16300000
#define KERNEL_AUTH_CMD 0x7
typedef enum {
SMEM_SPINLOCK_ARRAY = 7,
SMEM_AARM_PARTITION_TABLE = 9,
@ -42,4 +44,5 @@ typedef enum {
SMEM_MAX_SIZE = SMEM_PARTITION_TABLE_OFFSET + 1,
} smem_mem_type_t;
void reset_crashdump(void);
#endif /* _IPQ806X_H_ */

2
board/qca/ipq807x/ipq807x.h
View file

@ -30,6 +30,8 @@
#define GCC_SDCC1_APPS_D 0x1842014
#define GCC_BLSP1_UART1_APPS_CBCR 0x0180203c
#define KERNEL_AUTH_CMD 0x13
typedef enum {
SMEM_SPINLOCK_ARRAY = 7,
SMEM_AARM_PARTITION_TABLE = 9,

6
include/common.h
View file

@ -30,6 +30,10 @@ typedef volatile unsigned char vu_char;
#if defined(CONFIG_IPQ40XX)
#include <../board/qca/ipq40xx/ipq40xx.h>
#elif defined(CONFIG_IPQ806X)
#include <../board/qca/ipq806x/ipq806x.h>
#elif defined(CONFIG_IPQ_RUMI)
#include <../board/qca/ipq807x/ipq807x.h>
#endif
@ -393,7 +397,7 @@ ulong getenv_hex(const char *varname, ulong default_val);
* Return -1 if variable does not exist (default to true)
*/
int getenv_yesno(const char *var);
#if defined(CONFIG_IPQ40XX_ENV) || defined(CONFIG_IPQ807X_ENV)
#if defined(CONFIG_IPQ40XX_ENV) || defined(CONFIG_IPQ807X_ENV) || defined(CONFIG_IPQ806X_ENV)
extern int (*saveenv)(void);
#else
int saveenv (void);

5
include/configs/ipq40xx.h
View file

@ -166,11 +166,12 @@ typedef struct {
#define CONFIG_IPQ_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_IPQ_NAND_NAND_INFO_IDX 0
#define CONFIG_QPIC_NAND_NAND_INFO_IDX 0
#define CONFIG_IPQ_SPI_NAND_INFO_IDX 1
#define CONFIG_IPQ_SPI_NOR_INFO_IDX 2
#define CONFIG_NAND_FLASH_INFO_IDX CONFIG_QPIC_NAND_NAND_INFO_IDX
#define CONFIG_SPI_FLASH_INFO_IDX CONFIG_IPQ_SPI_NOR_INFO_IDX
#define QCA_ROOT_FS_PART_NAME "rootfs"
/*

99
include/configs/ipq806x.h
View file

@ -33,6 +33,8 @@
#endif
#endif /* !DO_DEPS_ONLY */
#define CONFIG_IPQ806X
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_IPQ806X_ENV
@ -71,38 +73,41 @@
#define CONFIG_ENV_SIZE 0x10000 /* 64 KB */
#define CONFIG_ENV_SIZE_MAX (256 << 10) /* 256 KB */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE_MAX + (256 << 10))
#define CONFIG_ENV_IS_NOWHERE 1
#define CONFIG_ENV_IS_NOWHERE 1
/*
* select serial console configuration
*/
#define CONFIG_CONS_INDEX 1
#define CONFIG_CONS_INDEX 1
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200}
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200}
#define V_PROMPT "(IPQ) # "
#define V_PROMPT "(IPQ) # "
#ifndef CONFIG_SYS_PROMPT
#define CONFIG_SYS_PROMPT V_PROMPT
#define CONFIG_SYS_PROMPT V_PROMPT
#endif
#define CONFIG_SYS_CBSIZE (512 * 2) /* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE (512 * 2) /* Console I/O Buffer Size */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN - CONFIG_ENV_SIZE - GENERATED_BD_INFO_SIZE)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN - CONFIG_ENV_SIZE - GENERATED_BD_INFO_SIZE)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_TEXT_BASE 0x41200000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
#define CONFIG_MAX_RAM_BANK_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + (64 << 20))
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_TEXT_BASE 0x41200000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
#define CONFIG_MAX_RAM_BANK_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + (64 << 20))
#define CONFIG_OF_COMBINE 1
#define QCA_KERNEL_START_ADDR CONFIG_SYS_SDRAM_BASE
#define QCA_BOOT_PARAMS_ADDR (QCA_KERNEL_START_ADDR + 0x100)
#define CONFIG_QCA_SMEM_BASE CONFIG_SYS_SDRAM_BASE + 0x1000000
#define CONFIG_OF_COMBINE 1
/*
* I2C Configs
@ -136,19 +141,16 @@
#define CONFIG_EFI_PARTITION
#define CONFIG_GENERIC_MMC
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
#define QCA_ROOT_FS_PART_NAME "rootfs"
#ifndef __ASSEMBLY__
#include <compiler.h>
#define CONFIG_QCA_SMEM_BASE CONFIG_SYS_SDRAM_BASE + 0x1000000
#endif /* __ASSEMBLY__ */
#ifndef CONFIG_CMD_MEMORY
#define CONFIG_CMD_MEMORY
#endif
#ifndef CONFIG_FIT
#define CONFIG_FIT
#endif
@ -158,10 +160,43 @@
/*Support for Compressed DTB image*/
#ifdef CONFIG_FIT
#define CONFIG_DTB_COMPRESSION
#define CONFIG_DTB_LOAD_MAXLEN 0x100000
#define CONFIG_DTB_LOAD_MAXLEN 0x100000
#endif
#define CONFIG_OF_LIBFDT 1
/*NAND Flash Configs*/
#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_IPQ_MAX_SPI_DEVICE 1
#define CONFIG_IPQ_MAX_NAND_DEVICE 1
#define CONFIG_SYS_MAX_NAND_DEVICE (CONFIG_IPQ_MAX_NAND_DEVICE + \
CONFIG_IPQ_MAX_SPI_DEVICE)
#define CONFIG_IPQ_NAND_NAND_INFO_IDX 0
#define CONFIG_IPQ_SPI_NAND_INFO_IDX 1
#define CONFIG_NAND_FLASH_INFO_IDX CONFIG_IPQ_NAND_NAND_INFO_IDX
#define CONFIG_SPI_FLASH_INFO_IDX CONFIG_IPQ_SPI_NAND_INFO_IDX
#define CONFIG_FDT_FIXUP_PARTITIONS
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_CMD_MTDPARTS
/*for ubi*/
#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#ifdef CONFIG_OF_BOARD_SETUP
#define DLOAD_DISABLE 1
#define BOOT_VERSION 0
#define TZ_VERSION 1
#endif
/* L1 cache line size is 64 bytes, L2 cache line size is 128 bytes
* Cache flush and invalidation based on L1 cache, so the cache line
@ -174,11 +209,17 @@
/*#define CONFIG_IPQ_REPORT_L2ERR*/
/*
* Location in IMEM which contains the physical address of
* 4K page allocated from kernel for storing the crashdump data
*/
* Location in IMEM which contains the physical address of
* 4K page allocated from kernel for storing the crashdump data
*/
#define CONFIG_IPQ_KERNEL_CRASHDUMP_ADDRESS 0x2A03F658
/*
* CRASH DUMP ENABLE
*/
#define CONFIG_QCA_APPSBL_DLOAD 1
#define TLMM_BASE_ADDR 0x00800000
#define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + 0x1000 + (x)*0x10)
#define GPIO_IN_OUT_ADDR(x) (TLMM_BASE_ADDR + 0x1004 + (x)*0x10)

4
include/configs/ipq807x.h
View file

@ -153,10 +153,12 @@ extern loff_t board_env_offset;
#define CONFIG_IPQ_MAX_NAND_DEVICE 1
#define CONFIG_IPQ_NAND_NAND_INFO_IDX 0
#define CONFIG_QPIC_NAND_NAND_INFO_IDX 0
#define CONFIG_IPQ_SPI_NOR_INFO_IDX 2
#define CONFIG_NAND_FLASH_INFO_IDX CONFIG_QPIC_NAND_NAND_INFO_IDX
#define CONFIG_SPI_FLASH_INFO_IDX CONFIG_IPQ_SPI_NOR_INFO_IDX
#define CONFIG_SCM_TZ64 1
/*
* U-Boot Env Configs