drivers: net: skip configuration if already configured

This patch skips uniphy configuration if it is already
configured with the requested mode.

Change-Id: I4aa1f249a5393881f83e35f3016259986085921c
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This commit is contained in:
Ram Kumar D 2024-04-12 17:25:24 +05:30
parent 065478fcfd
commit ef599b2d1b
6 changed files with 24 additions and 3 deletions

View file

@ -36,6 +36,7 @@ extern int ipq_mdio_write(int mii_id,
extern int ipq_mdio_read(int mii_id,
int regnum, ushort *data);
extern void ipq5332_qca8075_phy_serdes_reset(u32 phy_id);
int uniphy_cur_mode[PPE_MAX_UNIPHY_INSTANCE] = {-1, -1};
void csr1_write(int phy_id, int addr, int value)
{
@ -411,6 +412,9 @@ static void ppe_uniphy_usxgmii_mode_set(uint32_t uniphy_index)
void ppe_uniphy_mode_set(uint32_t uniphy_index, uint32_t mode)
{
if (uniphy_cur_mode[uniphy_index] == mode)
return;
switch(mode) {
case EPORT_WRAPPER_PSGMII:
ppe_uniphy_psgmii_mode_set(uniphy_index);
@ -432,8 +436,10 @@ void ppe_uniphy_mode_set(uint32_t uniphy_index, uint32_t mode)
ppe_uniphy_10g_r_mode_set(uniphy_index);
break;
default:
break;
return;
}
uniphy_cur_mode[uniphy_index] = mode;
}
void ppe_uniphy_usxgmii_autoneg_completed(uint32_t uniphy_index)

View file

@ -16,6 +16,7 @@
#define PPE_UNIPHY_INSTANCE0 0
#define PPE_UNIPHY_INSTANCE1 1
#define PPE_MAX_UNIPHY_INSTANCE 2
#define GCC_UNIPHY_REG_INC 0x10
#define PPE_UNIPHY_OFFSET_CALIB_4 0x1E0

View file

@ -29,6 +29,7 @@ extern int ipq_mdio_write(int mii_id,
extern int ipq_mdio_read(int mii_id,
int regnum, ushort *data);
extern void qca8075_phy_serdes_reset(u32 phy_id);
int uniphy_cur_mode[PPE_MAX_UNIPHY_INSTANCE] = {-1, -1};
void csr1_write(int phy_id, int addr, int value)
{
@ -257,6 +258,9 @@ static void ppe_uniphy_usxgmii_mode_set(uint32_t uniphy_index)
void ppe_uniphy_mode_set(uint32_t uniphy_index, uint32_t mode)
{
if (uniphy_cur_mode[uniphy_index] == mode)
return;
switch(mode) {
case PORT_WRAPPER_PSGMII:
ppe_uniphy_psgmii_mode_set(uniphy_index);
@ -278,8 +282,10 @@ void ppe_uniphy_mode_set(uint32_t uniphy_index, uint32_t mode)
ppe_uniphy_10g_r_mode_set(uniphy_index);
break;
default:
break;
return;
}
uniphy_cur_mode[uniphy_index] = mode;
}
void ppe_uniphy_usxgmii_autoneg_completed(uint32_t uniphy_index)

View file

@ -14,6 +14,7 @@
#define PPE_UNIPHY_INSTANCE0 0
#define PPE_UNIPHY_INSTANCE1 1
#define PPE_MAX_UNIPHY_INSTANCE 2
#define GCC_UNIPHY1_PORT5_RX_CBCR 0x1856110
#define GCC_UNIPHY1_PORT5_TX_CBCR 0x1856114
#define GCC_NSS_PORT5_RX_CBCR 0x1868260

View file

@ -38,6 +38,7 @@ extern int ipq_mdio_read(int mii_id,
int regnum, ushort *data);
extern void ipq9574_qca8075_phy_serdes_reset(u32 phy_id);
extern void qca8084_phy_interface_mode_set(void);
int uniphy_cur_mode[PPE_MAX_UNIPHY_INSTANCE] = {-1, -1, -1};
void csr1_write(int phy_id, int addr, int value)
{
@ -636,6 +637,9 @@ void ppe_uniphy_mode_set(uint32_t uniphy_index, uint32_t mode)
return;
}
if (uniphy_cur_mode[uniphy_index] == mode)
return;
switch(mode) {
case EPORT_WRAPPER_PSGMII:
ppe_uniphy_psgmii_mode_set(uniphy_index);
@ -661,8 +665,10 @@ void ppe_uniphy_mode_set(uint32_t uniphy_index, uint32_t mode)
ppe_uniphy_uqxgmii_mode_set(uniphy_index);
break;
default:
break;
return;
}
uniphy_cur_mode[uniphy_index] = mode;
}
void ppe_uniphy_usxgmii_autoneg_completed(uint32_t uniphy_index)

View file

@ -15,6 +15,7 @@
#define PPE_UNIPHY_INSTANCE1 1
#define PPE_UNIPHY_INSTANCE2 2
#define PPE_MAX_UNIPHY_INSTANCE 3
#define GCC_UNIPHY_REG_INC 0x10
#define PPE_UNIPHY_OFFSET_CALIB_4 0x1E0