mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2026-03-14 21:10:27 +01:00
mtd: nand: ipq: init mtd ecc strength and bitflip_threshold
1. assign ecc strength in mtd structure which will be used by mtd layer 2. Initialize bitflip_threshold with 3*4 of ecc strength so that MTD layer will return EUCLEAN if number of ecc correction are more than bitflip_threshold. Change-Id: I81cfe6059375117ced7888b877705919287a7be2 Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
This commit is contained in:
parent
4dcba1bb54
commit
e86df26289
1 changed files with 2 additions and 0 deletions
|
|
@ -1687,6 +1687,7 @@ int ipq_nand_scan(struct mtd_info *mtd)
|
|||
mtd->_sync = ipq_nand_sync;
|
||||
|
||||
mtd->ecclayout = NULL;
|
||||
mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);
|
||||
|
||||
chip->page_shift = ffs(mtd->writesize) - 1;
|
||||
chip->phys_erase_shift = ffs(mtd->erasesize) - 1;
|
||||
|
|
@ -1735,6 +1736,7 @@ static void ipq_nand_hw_config(struct mtd_info *mtd, struct ipq_config *cfg)
|
|||
|
||||
/* Make the device OOB size as QPIC supported OOB size. */
|
||||
mtd->oobsize = ipq_oob_size;
|
||||
mtd->ecc_strength = cfg->ecc_mode;
|
||||
if (dev->variant == QCA_NAND_QPIC) {
|
||||
/*
|
||||
* On IPQ40xx with the QPIC controller, we use BCH for both ECC
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue