ARM: dumpqca: Added entry for secure boot

Added a separate dumpinfo entry for
Secure boot to skip secure region.

Change-Id: Ib3836a851e8b0603a9c08013de293dcbe8e3c0fb
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>

arch/arm/include/asm/arch-qca-common/qca_common.h

@@ -61,8 +61,11 @@ struct dumpinfo_t{
 			    */
 	uint32_t offset; /* offset to be added to start address */
 };
-extern struct dumpinfo_t dumpinfo[];
+extern struct dumpinfo_t dumpinfo_n[];
-extern int dump_entries;
+extern int dump_entries_n;
+
+extern struct dumpinfo_t dumpinfo_s[];
+extern int dump_entries_s;
 
 #define MSM_SDC1_BASE		0x7824000
 #define MMC_IDENTIFY_MODE	0

board/qca/arm/common/cmd_bootqca.c

@@ -116,6 +116,9 @@ static int do_dumpqca_data(cmd_tbl_t *cmdtp, int flag, int argc,
 	int indx;
 	int ebi_indx = 0;
 	int ret = CMD_RET_FAILURE;
+	char buf = 1;
+	struct dumpinfo_t *dumpinfo = dumpinfo_n;
+	int dump_entries = dump_entries_n;
 
 	if (argc == 2) {
 		serverip = argv[1];
@@ -131,6 +134,13 @@ static int do_dumpqca_data(cmd_tbl_t *cmdtp, int flag, int argc,
 		}
 	}
 
+	ret = qca_scm_call(SCM_SVC_FUSE,
+			   QFPROM_IS_AUTHENTICATE_CMD, &buf, sizeof(char));
+	if (ret == 0 && buf == 1) {
+		dumpinfo = dumpinfo_s;
+		dump_entries = dump_entries_s;
+	}
+
 	for (indx = 0; indx < dump_entries; indx++) {
 		printf("\nProcessing %s:", dumpinfo[indx].name);
 
@@ -144,7 +154,16 @@ static int do_dumpqca_data(cmd_tbl_t *cmdtp, int flag, int argc,
 
 		if (!strncmp(dumpinfo[indx].name, "EBICS", strlen("EBICS")))
 		{
-			dumpinfo[indx].size = gd->ram_size;
+			if (!strncmp(dumpinfo[indx].name,
+				     "EBICS0", strlen("EBICS0")))
+				dumpinfo[indx].size = gd->ram_size;
+
+			if (!strncmp(dumpinfo[indx].name,
+				     "EBICS_S1", strlen("EBICS_S1")))
+				dumpinfo[indx].size = gd->ram_size
+						      - dumpinfo[indx - 1].size
+						      - 0x400000;
+
 			remaining = dumpinfo[indx].size;
 			while (remaining > 0) {
 				snprintf(dumpinfo[indx].name, sizeof(dumpinfo[indx].name), "EBICS%d.BIN", ebi_indx);

board/qca/arm/ipq40xx/ipq40xx.c

@@ -53,11 +53,18 @@ const add_node_t add_node[] = {
 	}
 };
 
-struct dumpinfo_t dumpinfo[] = {
+struct dumpinfo_t dumpinfo_n[] = {
 	{ "EBICS0.BIN", 0x80000000, 0x10000000, 0 },
 };
 
-int dump_entries = ARRAY_SIZE(dumpinfo);
+int dump_entries_n = ARRAY_SIZE(dumpinfo_n);
+
+struct dumpinfo_t dumpinfo_s[] = {
+	{ "EBICS0.bin", CONFIG_QCA_KERNEL_CRASHDUMP_ADDRESS,
+	  CONFIG_CPU_CONTEXT_DUMP_SIZE, 0 },
+};
+
+int dump_entries_s = ARRAY_SIZE(dumpinfo_s);
 
 extern loff_t board_env_offset;
 extern loff_t board_env_range;

board/qca/arm/ipq806x/ipq806x.c

@@ -37,7 +37,7 @@ const char *rsvd_node = "/reserved-memory";
 const char *del_node[] = {NULL};
 const add_node_t add_node[] = {{}};
 
-struct dumpinfo_t dumpinfo[] = {
+struct dumpinfo_t dumpinfo_n[] = {
 	/* Note1: when aligned access is set, the contents
 	 * are copied to a temporary location and so
 	 * the size of region should not exceed the size
@@ -65,7 +65,10 @@ struct dumpinfo_t dumpinfo[] = {
 	{ "EBICS0.BIN",   0x40000000, 0x20000000, 0 },
 	{ "EBI1CS1.BIN",  0x60000000, 0x20000000, 0 }
 };
-int dump_entries = ARRAY_SIZE(dumpinfo);
+int dump_entries_n = ARRAY_SIZE(dumpinfo_n);
+
+struct dumpinfo_t *dumpinfo_s = dumpinfo_n;
+int dump_entries_s = dump_entries_n;
 
 extern int ipq_spi_init(u16);
 

board/qca/arm/ipq807x/ipq807x.c

@@ -47,7 +47,7 @@ const char *del_node[] = {"uboot",
 			  NULL};
 const add_node_t add_node[] = {{}};
 static int pci_initialised;
-struct dumpinfo_t dumpinfo[] = {
+struct dumpinfo_t dumpinfo_n[] = {
 	/* TZ stores the DDR physical address at which it stores the
 	 * APSS regs, NSS IMEM copy and PMIC dump. We will have the TZ IMEM
 	 * IMEM Addr at which the DDR physical address is stored as
@@ -71,7 +71,17 @@ struct dumpinfo_t dumpinfo[] = {
 	{ "MSGRAM.BIN", 0x00060000, 0x00006000, 1 },
 	{ "IMEM.BIN", 0x08600000, 0x00006000, 0 },
 };
-int dump_entries = ARRAY_SIZE(dumpinfo);
+int dump_entries_n = ARRAY_SIZE(dumpinfo_n);
+
+struct dumpinfo_t dumpinfo_s[] = {
+	{ "NSSIMEM.BIN", 0x08600658, 0x00060000, 0, 1, 0x2000 },
+	{ "EBICS_S0.BIN", 0x40000000, 0xAC00000, 0 },
+	{ "EBICS_S1.BIN", CONFIG_TZ_END_ADDR, 0x10000000, 0 },
+	{ "DATARAM.BIN", 0x00290000, 0x00010000, 0 },
+	{ "MSGRAM.BIN", 0x00060000, 0x00006000, 1 },
+	{ "IMEM.BIN", 0x08600000, 0x00006000, 0 },
+};
+int dump_entries_s = ARRAY_SIZE(dumpinfo_s);
 
 void uart2_configure_mux(void)
 {