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board: ipq5018: Enable gcc cbcr clk for qpic.

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Change-Id: Id30214131b0ef5476437597aba70d81e48fe7c8d
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
This commit is contained in:
Vandhiadevan Karunamoorthy 2020-01-21 10:46:40 +05:30 • committed by Gerrit - the friendly Code Review server
parent 0b98a31e25
commit db70e98a74
2 changed files with 5 additions and 3 deletions
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1
board/qca/arm/ipq5018/ipq5018.c
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@ -505,6 +505,7 @@ void qpic_clk_enbale(void)
writel(QPIC_CBCR_VAL, GCC_QPIC_CBCR_ADDR);
writel(0x1, GCC_QPIC_AHB_CBCR_ADDR);
writel(0x1, GCC_QPIC_IO_MACRO_CBCR);
writel(0x1, GCC_QPIC_CBCR_ADDR);
}
void board_nand_init(void)

7
drivers/mtd/nand/qpic_nand.c
View file

@ -1378,7 +1378,7 @@ static void qpic_spi_init(struct mtd_info *mtd)
uint32_t xfer_start = NAND_XFR_STEPS_V1_5_20;
int i;
/* Enabel QSPI CLK*/
/* Enabel QPIC CLK*/
qpic_clk_enbale();
/* Configure the NAND_FLASH_SPI_CFG to load the timer CLK_CNTR_INIT_VAL_VEC
@ -3194,6 +3194,9 @@ void qpic_nand_init(void)
}
#ifdef CONFIG_QPIC_SERIAL
qpic_spi_init(mtd);
/* Read the Hardware Version register */
hw_ver = readl(NAND_VERSION);
/* Only maintain major number */
@ -3205,8 +3208,6 @@ void qpic_nand_init(void)
__func__);
return;
}
qpic_spi_init(mtd);
#ifdef MULTI_PAGE_READ
config.pipes.status_pipe = NAND_BAM_STATUS_PIPE;
config.pipes.status_pipe_grp = NAND_BAM_STATUS_PIPE_GRP;