mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2026-03-11 11:38:51 +01:00
ipq9574: Add PCIE support
Change-Id: I7272cf5bd27a7b62ae35f23cda7f980e177e2fd5 Signed-off-by: anusha <anusharao@codeaurora.org>
This commit is contained in:
anusha
parent
be18366519
commit
dab796560d
7 changed files with 192 additions and 7 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -66,8 +66,43 @@
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};
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};
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xhci@8a00000 {
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qcom,emulation = <1>;
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};
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pci0: pci@28000000 {
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status = "disabled";
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perst_gpio = <39>;
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pci_gpio {
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pci_rst {
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};
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};
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};
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pci1: pci@20000000 {
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status = "disabled";
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perst_gpio = <41>;
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pci_gpio {
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pci_rst {
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};
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};
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};
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pci2: pci@18000000 {
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status = "disabled";
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perst_gpio = <42>;
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pci_gpio {
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pci_rst {
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};
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};
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};
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pci3: pci@10000000 {
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status = "disabled";
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perst_gpio = <40>;
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pci_gpio {
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pci_rst {
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};
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};
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};
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};
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -73,6 +73,86 @@
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reg = <0x8a00000 0xcd00>;
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};
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pci@28000000 {
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compatible = "qcom,ipq9574-pcie";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x28000000 0xf1d
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0x80000 0x3000
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0x28000F20 0xa8
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0x28001000 0x1000
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0x28300000 0xd00000
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0x28100000 0x100000
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0x1828000 0x60
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0x84000 0x1000>;
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reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
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"axi_conf", "pci_rst", "pci_phy";
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gen3 = <1>;
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lane = <1>;
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status = "disabled";
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skip_phy_int = <1>;
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};
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pci@20000000 {
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compatible = "qcom,ipq9574-pcie";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x20000000 0xf1d
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0x88000 0x3000
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0x20000F20 0xa8
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0x20001000 0x1000
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0x20300000 0xd00000
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0x20100000 0x100000
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0x1829000 0x60
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0x8c000 0x1000>;
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reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
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"axi_conf", "pci_rst", "pci_phy";
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gen3 = <1>;
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lane = <2>;
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status = "disabled";
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skip_phy_int = <1>;
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};
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pci@18000000 {
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compatible = "qcom,ipq9574-pcie";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x18000000 0xf1d
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0xF0000 0x3000
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0x18000F20 0xa8
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0x18001000 0x1000
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0x18300000 0xd00000
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0x18100000 0x100000
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0x182A000 0x60
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0xF4000 0x1000>;
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reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
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"axi_conf", "pci_rst", "pci_phy";
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gen3 = <1>;
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lane = <2>;
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status = "disabled";
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skip_phy_int = <1>;
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};
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pci@10000000 {
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compatible = "qcom,ipq9574-pcie";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x10000000 0xf1d
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0xF8000 0x3000
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0x10000F20 0xa8
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0x10001000 0x1000
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0x10300000 0xd00000
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0x10100000 0x100000
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0x182B000 0x60
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0xFC000 0x1000>;
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reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
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"axi_conf", "pci_rst", "pci_phy";
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gen3 = <1>;
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lane = <1>;
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status = "disabled";
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skip_phy_int = <1>;
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};
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timer {
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gcnt_cntcv_lo = <0x4a2000>;
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gcnt_cntcv_hi = <0x4a2004>;
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -541,6 +541,60 @@ void ipq_fdt_fixup_usb_device_mode(void *blob)
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printf("%s: invalid param for usb_mode\n", __func__);
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}
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#ifdef CONFIG_PCI_IPQ
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void board_pci_init(int id)
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{
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int node, gpio_node;
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char name[16];
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snprintf(name, sizeof(name), "pci%d", id);
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node = fdt_path_offset(gd->fdt_blob, name);
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if (node < 0) {
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printf("Could not find PCI%d in device tree\n", id);
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return;
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}
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gpio_node = fdt_subnode_offset(gd->fdt_blob, node, "pci_gpio");
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if (gpio_node >= 0)
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qca_gpio_init(gpio_node);
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return;
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}
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void board_pci_deinit()
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{
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int node, gpio_node, i, err;
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char name[16];
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struct fdt_resource parf;
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struct fdt_resource pci_phy;
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for (i = 0; i < PCI_MAX_DEVICES; i++) {
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snprintf(name, sizeof(name), "pci%d", i);
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node = fdt_path_offset(gd->fdt_blob, name);
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if (node < 0) {
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printf("Could not find PCI%d in device tree\n", i);
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continue;
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}
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err = fdt_get_named_resource(gd->fdt_blob, node, "reg", "reg-names", "parf",
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&parf);
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writel(0x0, parf.start + 0x358);
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writel(0x1, parf.start + 0x40);
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err = fdt_get_named_resource(gd->fdt_blob, node, "reg", "reg-names", "pci_phy",
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&pci_phy);
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if (err < 0)
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continue;
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writel(0x1, pci_phy.start + 800);
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writel(0x0, pci_phy.start + 804);
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gpio_node = fdt_subnode_offset(gd->fdt_blob, node, "pci_gpio");
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if (gpio_node >= 0)
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qca_gpio_deinit(gpio_node);
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}
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return ;
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}
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#endif
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void enable_caches(void)
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{
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -206,6 +206,11 @@
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#define USB3_PHY_SW_RESET 0x800
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#define NOC_HANDSHAKE_FSM_EN (1 << 15)
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#ifdef CONFIG_PCI_IPQ
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void board_pci_init(int id);
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__weak void board_pcie_clock_init(int id) {}
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#endif
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unsigned int __invoke_psci_fn_smc(unsigned int, unsigned int,
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unsigned int, unsigned int);
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@ -222,6 +222,7 @@ CONFIG_QPIC_SERIAL=y
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# PCI
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#
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# CONFIG_DM_PCI is not set
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CONFIG_PCI_IPQ=y
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#
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# Pin controllers
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014, 2015-2017, 2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2014, 2015-2017, 2020-2021 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -607,6 +607,7 @@ static const struct udevice_id pcie_ver_ids[] = {
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{ .compatible = "qcom,ipq807x-pcie", .data = PCIE_V2 },
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{ .compatible = "qcom,ipq6018-pcie", .data = PCIE_V2 },
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{ .compatible = "qcom,ipq5018-pcie", .data = PCIE_V2 },
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{ .compatible = "qcom,ipq9574-pcie", .data = PCIE_V2 },
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{ },
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};
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2018,2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2016-2018,2020-2021 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -156,6 +156,15 @@ extern loff_t board_env_size;
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#endif
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/*
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* PCIE Enable
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*/
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#define PCI_MAX_DEVICES 4
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#if defined(CONFIG_PCI_IPQ)
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#define CONFIG_PCI
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#define CONFIG_CMD_PCI
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#define CONFIG_PCI_SCAN_SHOW
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#endif
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/*
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* NAND Flash Configs
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