mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2025-12-10 07:44:53 +01:00
Revert "ipq6018: enable mmc workaround"
This reverts commit 27df165798.
Change-Id: Ib729f94b4862cfcd7c3ce1cbc467dade503fc179
Signed-off-by: Antony Arun T <antothom@codeaurora.org>
This commit is contained in:
parent
b858c4fdae
commit
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7 changed files with 9 additions and 19 deletions
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@ -21,7 +21,7 @@
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aliases {
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aliases {
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console = "/serial@78B1000";
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console = "/serial@78B1000";
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mmc = "/sdhci@07804000";
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mmc = "/sdhci@7804000";
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pci0 = "/pci@20000000";
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pci0 = "/pci@20000000";
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usb0 = "/xhci@8a00000";
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usb0 = "/xhci@8a00000";
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};
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};
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@ -21,7 +21,7 @@
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aliases {
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aliases {
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console = "/serial@78B1000";
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console = "/serial@78B1000";
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mmc = "/sdhci@07804000";
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mmc = "/sdhci@7804000";
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pci0 = "/pci@20000000";
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pci0 = "/pci@20000000";
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usb0 = "/xhci@8a00000";
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usb0 = "/xhci@8a00000";
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usb1 = "/xhci@7000000";
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usb1 = "/xhci@7000000";
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@ -21,7 +21,7 @@
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aliases {
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aliases {
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console = "/serial@78B1000";
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console = "/serial@78B1000";
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mmc = "/sdhci@07804000";
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mmc = "/sdhci@7804000";
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pci0 = "/pci@20000000";
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pci0 = "/pci@20000000";
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usb0 = "/xhci@8a00000";
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usb0 = "/xhci@8a00000";
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usb1 = "/xhci@7000000";
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usb1 = "/xhci@7000000";
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@ -112,6 +112,10 @@
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nand_gpio {};
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nand_gpio {};
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};
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};
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mmc: sdhci@7804000 {
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compatible = "qcom,sdhci-msm";
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};
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i2c0: i2c@78b6000 {
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i2c0: i2c@78b6000 {
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compatible = "qcom,qup-i2c";
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compatible = "qcom,qup-i2c";
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#address-cells = <1>;
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#address-cells = <1>;
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@ -66,10 +66,6 @@
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reg = <0x7000000 0xcd00>;
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reg = <0x7000000 0xcd00>;
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};
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};
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mmc: sdhci@07804000 {
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compatible = "qcom,sdhci-msm";
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};
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spi {
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spi {
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status = "ok";
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status = "ok";
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@ -225,12 +225,9 @@ void emmc_clock_config()
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writel(0x20B, GCC_SDCC1_APPS_CFG_RCGR);
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writel(0x20B, GCC_SDCC1_APPS_CFG_RCGR);
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/* Delay for clock operation complete */
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/* Delay for clock operation complete */
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udelay(10);
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udelay(10);
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/* writel(0x1, GCC_SDCC1_APPS_M);
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writel(0x1, GCC_SDCC1_APPS_M);
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writel(0xFC, GCC_SDCC1_APPS_N);
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writel(0xFC, GCC_SDCC1_APPS_N);
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writel(0xFD, GCC_SDCC1_APPS_D);
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writel(0xFD, GCC_SDCC1_APPS_D);
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*/
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writel(0, GCC_SDCC1_APPS_M);
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writel(0, GCC_SDCC1_APPS_N);
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/* Delay for clock operation complete */
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/* Delay for clock operation complete */
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udelay(10);
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udelay(10);
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/* Update APPS_CMD_RCGR to reflect source selection */
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/* Update APPS_CMD_RCGR to reflect source selection */
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@ -485,15 +485,8 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
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timeout--;
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timeout--;
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udelay(1000);
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udelay(1000);
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}
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}
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#ifdef CONFIG_IPQ6018
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/*Forcefully change the clk to 24MHz for IPQ6018*/
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if (clock == 52000000)
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clk |= 0x00000407;
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else
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clk |= SDHCI_CLOCK_CARD_EN;
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#else
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clk |= SDHCI_CLOCK_CARD_EN;
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clk |= SDHCI_CLOCK_CARD_EN;
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#endif
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sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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return 0;
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return 0;
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}
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}
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