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ipq40xx: Adding gpio info to dts files

Browse source 
This change adds uart, spi, nand, emmc gpios
to dts files. Also, config info like machid,
ddr size, supported flash configs are added to
dts files.

Change-Id: Id130b721fb09777d58401334d7f59c6377b84496
Signed-off-by: Akila N <akilan@codeaurora.org>
This commit is contained in:
Akila N 2016-08-11 17:00:04 +05:30 • committed by Gerrit - the friendly Code Review server
parent e7aaad5e69
commit d381bc5b2f
7 changed files with 579 additions and 36 deletions
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4
arch/arm/dts/Makefile
View file

@ -24,7 +24,9 @@ dtb-$(CONFIG_ARCH_IPQ807x) += ipq807x-hk01.dtb
dtb-$(CONFIG_ARCH_IPQ806x) += ipq806x-ap148.dtb
dtb-$(CONFIG_ARCH_IPQ40xx) += ipq40xx-dk01.dtb
dtb-$(CONFIG_ARCH_IPQ40xx) += ipq40xx-dk01-c1.dtb \
ipq40xx-dk01-c2.dtb \
ipq40xx-dk04-c1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly.dtb \

20
arch/arm/dts/ipq40xx-dk01-c1.dts Normal file
View file

@ -0,0 +1,20 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk01.dtsi"
/ {
machid = <0x8010000>;
ddr_size = <256>;
config_name = "config@ap.dk01.1-c1";
};

21
arch/arm/dts/ipq40xx-dk01-c2.dts Normal file
View file

@ -0,0 +1,21 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk01.dtsi"
/ {
machid = <0x8010100>;
ddr_size = <256>;
spi_nand_available = <1>;
config_name = "config@ap.dk01.1-c2";
};

63
arch/arm/dts/ipq40xx-dk01.dtsi
View file

@ -11,46 +11,39 @@
* GNU General Public License for more details.
*/
#include "skeleton.dtsi"
#include "ipq40xx-soc.dtsi"
#include <dt-bindings/qcom/gpio-ipq40xx.h>
/ {
model ="QCA, IPQ40xx-DK01";
compatible = "qca,ipq40xx", "qca,ipq40xx-dk01";
aliases {
console = "/serial@78af000";
xhci0 = "/xhci@8a00000";
xhci1 = "/xhci@6000000";
i2c0 = "/i2c@78b7000";
};
serial@78af000 {
compatible = "qca,ipq-uartdm";
reg = <0x78af000 0x200>;
bit_rate = <0xff>;
id = <2>;
serial_gpio {
gpio1 {
gpio = <60>;
func = <2>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <61>;
func = <2>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
};
};
timer {
gcnt_base = <0x4a1000>;
gcnt_cntcv_lo = <0x4a2000>;
gcnt_cntcv_hi = <0x4a2004>;
gpt_freq_hz = <48000000>;
timer_load_val = <0x00FFFFFF 0xFFFFFFFF>;
};
xhci@8a00000 {
compatible = "qca,dwc3-ipq";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x8a00000 0xcd00>;
rst_ctrl = <0x181E038 0x4>;
};
xhci@6000000 {
compatible = "qca,dwc3-ipq";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x6000000 0xcd00>;
rst_ctrl = <0x181E01C 0x4>;
};
i2c0: i2c@78b7000 {
compatible = "qcom,qup-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x78b7000 0x600>;
spi {
status = "ok";
};
};

24
arch/arm/dts/ipq40xx-dk04-c1.dts Normal file
View file

@ -0,0 +1,24 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk04.dtsi"
/ {
machid = <0x8010001>;
ddr_size = <256>;
config_name = "config@ap.dk04.1-c1";
sdhci@7824000 {
status = "ok";
};
};

411
arch/arm/dts/ipq40xx-dk04.dtsi Normal file
View file

@ -0,0 +1,411 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "ipq40xx-soc.dtsi"
#include <dt-bindings/qcom/gpio-ipq40xx.h>
/ {
model ="QCA, IPQ40xx-DK04";
compatible = "qca,ipq40xx", "qca,ipq40xx-dk04";
aliases {
console = "/serial@78af000";
xhci0 = "/xhci@8a00000";
xhci1 = "/xhci@6000000";
i2c0 = "/i2c@78b7000";
};
serial@78af000 {
serial_gpio {
gpio1 {
gpio = <16>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <17>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
};
};
spi {
status = "ok";
spi_gpio {
gpio1 {
gpio = <12>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <13>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <14>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <15>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
nand@79B0000 {
status = "ok";
nand_gpio {
gpio1 {
gpio = <52>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <53>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <54>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <55>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio5 {
gpio = <56>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio6 {
gpio = <57>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio7 {
gpio = <58>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio8 {
gpio = <59>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio9 {
gpio = <60>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio10 {
gpio = <61>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio11 {
gpio = <62>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio12 {
gpio = <63>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio13 {
gpio = <64>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio14 {
gpio = <65>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio15 {
gpio = <66>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio16 {
gpio = <67>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio17 {
gpio = <68>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio18 {
gpio = <69>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
sdhci@7824000 {
mmc_gpio {
gpio1 {
gpio = <23>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <24>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <25>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <26>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio5 {
gpio = <27>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_16MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio6 {
gpio = <28>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio7 {
gpio = <29>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio8 {
gpio = <30>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio9 {
gpio = <31>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio10 {
gpio = <32>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
};

72
arch/arm/dts/ipq40xx-soc.dtsi Normal file
View file

@ -0,0 +1,72 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "skeleton.dtsi"
/ {
serial@78af000 {
compatible = "qca,ipq-uartdm";
reg = <0x78af000 0x200>;
bit_rate = <0xff>;
id = <2>;
};
timer {
gcnt_base = <0x4a1000>;
gcnt_cntcv_lo = <0x4a2000>;
gcnt_cntcv_hi = <0x4a2004>;
gpt_freq_hz = <48000000>;
timer_load_val = <0x00FFFFFF 0xFFFFFFFF>;
};
spi {
status = "disabled";
};
nand@79B0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,qpic-nand.1.4.20";
reg = <0x79B0000 0x10000>;
status = "disabled";
};
sdhci@7824000 {
reg = <0x7824000 0x800>;
status = "disabled";
};
xhci@8a00000 {
compatible = "qca,dwc3-ipq";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x8a00000 0xcd00>;
rst_ctrl = <0x181E038 0x4>;
};
xhci@6000000 {
compatible = "qca,dwc3-ipq";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x6000000 0xcd00>;
rst_ctrl = <0x181E01C 0x4>;
};
i2c0: i2c@78b7000 {
compatible = "qcom,qup-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x78b7000 0x600>;
};
};