From b0ba1e7e9d9b9441a18048ec67a3b3100c096975 Mon Sep 17 00:00:00 2001 From: Wadim Egorov Date: Mon, 19 Mar 2018 16:39:29 +0100 Subject: [PATCH 01/17] rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message. This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success. Signed-off-by: Wadim Egorov Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 3a36d04096..78ada2d2db 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -893,12 +893,25 @@ static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *par return -ENOENT; } +static int rk3288_clk_enable(struct clk *clk) +{ + switch (clk->id) { + case HCLK_USBHOST0: + case HCLK_HSIC: + return 0; + } + + debug("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; +} + static struct clk_ops rk3288_clk_ops = { .get_rate = rk3288_clk_get_rate, .set_rate = rk3288_clk_set_rate, #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .set_parent = rk3288_clk_set_parent, #endif + .enable = rk3288_clk_enable, }; static int rk3288_clk_ofdata_to_platdata(struct udevice *dev) From 2144c74f684a8baa7f170a34fbcf13d551a6ae64 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Fri, 13 Apr 2018 00:45:57 +0200 Subject: [PATCH 02/17] rockchip: rk3288: provide ${fdtfile} All rk3288 default configs define CONFIG_DEFAULT_DEVICE_TREE. So we can use it to define ${fdtfile} in rk3288_common.h. This variable is needed by the distro boot command. Signed-off-by: Heinrich Schuchardt Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- include/configs/rk3288_common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 78595b86ec..9b7b24ff96 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -73,6 +73,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x0fffffff\0" \ "initrd_high=0x0fffffff\0" \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \ From 82a8e6c614ce50fc8313d1f8637f1552e1559c90 Mon Sep 17 00:00:00 2001 From: Klaus Goger Date: Fri, 13 Apr 2018 10:54:28 +0200 Subject: [PATCH 03/17] rockchip: defconfig: puma-rk3399: enable RTC commit: 52280315a4 ("rtc: rewrite isl1208 to support DM") enables us to use the on-module RTC emulation with the rk3399 device model i2c driver. Signed-off-by: Klaus Goger Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- configs/puma-rk3399_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 4324a82e76..b80aaaa9a7 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -80,6 +80,8 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y +CONFIG_DM_RTC=y +CONFIG_RTC_ISL1208=y CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 From e0e1d3f98c78926b7dcff19244377ae1c545bab5 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Wed, 25 Apr 2018 14:07:06 +0200 Subject: [PATCH 04/17] rockchip: timer: add compatible strings for rk3188 and rk3288 The DM driver for ockchip timer blocks is also applicable to the RK3188 and RK3288 timer blocks: add 'rockchip,rk3188-timer' and 'rockchip,rk3288-timer' to its compatible list to support devices claiming compatibility with these. Signed-off-by: Philipp Tomsich --- drivers/timer/rockchip_timer.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c index 07d14482d6..b847bc40c4 100644 --- a/drivers/timer/rockchip_timer.c +++ b/drivers/timer/rockchip_timer.c @@ -152,6 +152,8 @@ static const struct timer_ops rockchip_timer_ops = { }; static const struct udevice_id rockchip_timer_ids[] = { + { .compatible = "rockchip,rk3188-timer" }, + { .compatible = "rockchip,rk3288-timer" }, { .compatible = "rockchip,rk3368-timer" }, {} }; From 7abb7e8fcb653c1b2bef7a30f83d3a97777fd3bc Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 18 Apr 2018 11:13:44 +0800 Subject: [PATCH 05/17] rockchip: rk3188: add -u-boot.dtsi for rock-rk3188 We should a -u-boot.dtsi for those config need by U-Boot only, and other part sync with kernel. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- arch/arm/dts/rk3188-radxarock-u-boot.dtsi | 18 ++++++++++++++++++ arch/arm/dts/rk3188-radxarock.dts | 6 +----- arch/arm/dts/rk3188.dtsi | 2 -- 3 files changed, 19 insertions(+), 7 deletions(-) create mode 100644 arch/arm/dts/rk3188-radxarock-u-boot.dtsi diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi new file mode 100644 index 0000000000..5d650b17ef --- /dev/null +++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +&cru { + u-boot,dm-spl; +}; + +&pinctrl { + u-boot,dm-spl; +}; + +&uart2 { + status = "okay"; + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts index 5f5b5e9a1f..0fc4f54af2 100644 --- a/arch/arm/dts/rk3188-radxarock.dts +++ b/arch/arm/dts/rk3188-radxarock.dts @@ -7,6 +7,7 @@ /dts-v1/; #include #include "rk3188.dtsi" +#include "rk3188-radxarock-u-boot.dtsi" / { model = "Radxa Rock"; @@ -356,11 +357,6 @@ status = "okay"; }; -&uart2 { - status = "okay"; - u-boot,dm-spl; -}; - &uart3 { status = "okay"; }; diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi index f4d438eb66..1a0684320a 100644 --- a/arch/arm/dts/rk3188.dtsi +++ b/arch/arm/dts/rk3188.dtsi @@ -105,7 +105,6 @@ compatible = "rockchip,rk3188-cru"; reg = <0x20000000 0x1000>; rockchip,grf = <&grf>; - u-boot,dm-spl; #clock-cells = <1>; #reset-cells = <1>; @@ -156,7 +155,6 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-spl; gpio0: gpio0@2000a000 { compatible = "rockchip,gpio-bank"; From f9ef5447863f88898db2e997a5e056bcdb8362a5 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 18 Apr 2018 11:13:45 +0800 Subject: [PATCH 06/17] rockchip: rk3188: add timer3 node Add dts node for timer3. Because of the rockchip timer can only KNOWN "dtd_rockchip_rk3368_timer" with OF_PLATDATA enable, so we override its compatible to "rockchip,rk3368-timer". Signed-off-by: Kever Yang Acked-by: Philipp Tomsich --- arch/arm/dts/rk3188-radxarock-u-boot.dtsi | 6 ++++++ arch/arm/dts/rk3188.dtsi | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi index 5d650b17ef..26f5707bb8 100644 --- a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi +++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi @@ -16,3 +16,9 @@ status = "okay"; u-boot,dm-spl; }; + +&timer3 { + compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer"; + u-boot,dm-spl; + clock-frequency = <24000000>; +}; diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi index 1a0684320a..aeb5b80e14 100644 --- a/arch/arm/dts/rk3188.dtsi +++ b/arch/arm/dts/rk3188.dtsi @@ -123,6 +123,12 @@ }; }; + timer3: timer@2000e000 { + compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; + reg = <0x2000e000 0x20>; + interrupts = ; + }; + usbphy: phy { compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy"; rockchip,grf = <&grf>; From fd9e0fe0e3f087fd5abec19ebf620c7a79a93040 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 18 Apr 2018 11:13:46 +0800 Subject: [PATCH 07/17] rockchip: rk3188: use DM timer instead of rk_timer Disable rk_timer as SYS timer and use DM timer instead, so that we can get a better timer framework, the rk_timer is going to be clean after we conver to use DM timer or ARM arch/generic timer. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- arch/arm/mach-rockchip/Makefile | 2 ++ arch/arm/mach-rockchip/rk3188-board-spl.c | 2 -- configs/rock_defconfig | 3 +++ include/configs/rk3188_common.h | 5 ----- 4 files changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index e1b0519b1f..096dbac25b 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -40,8 +40,10 @@ endif obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o ifndef CONFIG_ARM64 +ifndef CONFIG_ROCKCHIP_RK3188 obj-y += rk_timer.o endif +endif obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/ obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/ diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index 74771d3a0b..3ccc4f1205 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -131,8 +131,6 @@ void board_init_f(ulong dummy) hang(); } - rockchip_timer_init(); - ret = rockchip_get_clk(&dev); if (ret) { debug("CLK init failed: %d\n", ret); diff --git a/configs/rock_defconfig b/configs/rock_defconfig index c4a236ccf6..9112985500 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -5,6 +5,9 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3188=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_ROCKCHIP_TIMER=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_ROCK=y CONFIG_SPL_STACK_R_ADDR=0x60080000 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 94f8cda853..e07facd9c3 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -17,11 +17,6 @@ #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) -#define CONFIG_SYS_TIMER_BASE 0x2000e000 /* TIMER3 */ -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_TIMER_COUNTS_DOWN - #define CONFIG_SYS_NS16550_MEM32 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM From ced3c10fd28dd2c9658a575a136802adf87df611 Mon Sep 17 00:00:00 2001 From: Patrick Uiterwijk Date: Wed, 25 Apr 2018 10:50:04 +0100 Subject: [PATCH 08/17] arm: rockchip: make_fit_atf: remove unneeded imports These imports are entirely unused in the entire script. Signed-off-by: Patrick Uiterwijk Signed-off-by: Peter Robinson Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- arch/arm/mach-rockchip/make_fit_atf.py | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py index 7c6dd57678..9a404d1d32 100755 --- a/arch/arm/mach-rockchip/make_fit_atf.py +++ b/arch/arm/mach-rockchip/make_fit_atf.py @@ -13,8 +13,6 @@ import getopt # pip install pyelftools from elftools.elf.elffile import ELFFile -from elftools.elf.sections import SymbolTableSection -from elftools.elf.segments import Segment, InterpSegment, NoteSegment ELF_SEG_P_TYPE='p_type' ELF_SEG_P_PADDR='p_paddr' From 239a25aef1251e1c7a00c067caeb057d1fed63b9 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 25 Apr 2018 10:50:05 +0100 Subject: [PATCH 09/17] config: evb-rk3399: enable make uboot.itb Similar to firefly 3399 enable the ability to create a FIT image with combined arm-trusted-firmware. Signed-off-by: Peter Robinson Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- configs/evb-rk3399_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index b36f232dcb..67ba0ce015 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y @@ -25,6 +26,8 @@ CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_OF_PLATDATA=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y From accaaea5ccef936c9ea5f6da56d021bb717ed3b6 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Tue, 24 Apr 2018 11:27:06 +0800 Subject: [PATCH 10/17] rockchip: rk3036: add ofdata_to_platdata() method for driver Parse of data in dedicated api instead of in probe(). The clk_set_rate() may be called before the clk driver is probed, after core support set default clock. This patch fix system abort issue since: f4fcba5 clk: implement clk_set_defaults() Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- drivers/clk/rockchip/clk_rk3036.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c index 560222b96c..5e11318042 100644 --- a/drivers/clk/rockchip/clk_rk3036.c +++ b/drivers/clk/rockchip/clk_rk3036.c @@ -317,11 +317,19 @@ static struct clk_ops rk3036_clk_ops = { .set_rate = rk3036_clk_set_rate, }; -static int rk3036_clk_probe(struct udevice *dev) +static int rk3036_clk_ofdata_to_platdata(struct udevice *dev) { struct rk3036_clk_priv *priv = dev_get_priv(dev); priv->cru = dev_read_addr_ptr(dev); + + return 0; +} + +static int rk3036_clk_probe(struct udevice *dev) +{ + struct rk3036_clk_priv *priv = dev_get_priv(dev); + rkclk_init(priv->cru); return 0; @@ -367,6 +375,7 @@ U_BOOT_DRIVER(rockchip_rk3036_cru) = { .id = UCLASS_CLK, .of_match = rk3036_clk_ids, .priv_auto_alloc_size = sizeof(struct rk3036_clk_priv), + .ofdata_to_platdata = rk3036_clk_ofdata_to_platdata, .ops = &rk3036_clk_ops, .bind = rk3036_clk_bind, .probe = rk3036_clk_probe, From d2e938d993074ebd989b20901590be7d4f79bf85 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Tue, 24 Apr 2018 11:27:07 +0800 Subject: [PATCH 11/17] rockchip: rk3128: add ofdata_to_platdata() method for driver Parse of data in dedicated api instead of in probe(). The clk_set_rate() may be called before the clk driver is probed, after core support set default clock. This patch fix system abort issue since: f4fcba5 clk: implement clk_set_defaults() Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- drivers/clk/rockchip/clk_rk3128.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c index 132d50dda3..7b479e79bb 100644 --- a/drivers/clk/rockchip/clk_rk3128.c +++ b/drivers/clk/rockchip/clk_rk3128.c @@ -546,11 +546,19 @@ static struct clk_ops rk3128_clk_ops = { .set_rate = rk3128_clk_set_rate, }; +static int rk3128_clk_ofdata_to_platdata(struct udevice *dev) +{ + struct rk3128_clk_priv *priv = dev_get_priv(dev); + + priv->cru = dev_read_addr_ptr(dev); + + return 0; +} + static int rk3128_clk_probe(struct udevice *dev) { struct rk3128_clk_priv *priv = dev_get_priv(dev); - priv->cru = (struct rk3128_cru *)dev_read_addr(dev); rkclk_init(priv->cru); return 0; @@ -590,6 +598,7 @@ U_BOOT_DRIVER(rockchip_rk3128_cru) = { .id = UCLASS_CLK, .of_match = rk3128_clk_ids, .priv_auto_alloc_size = sizeof(struct rk3128_clk_priv), + .ofdata_to_platdata = rk3128_clk_ofdata_to_platdata, .ops = &rk3128_clk_ops, .bind = rk3128_clk_bind, .probe = rk3128_clk_probe, From c877ef3ac163259b0098acaac15f878aca0c9673 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Tue, 24 Apr 2018 11:27:08 +0800 Subject: [PATCH 12/17] rockchip: rv1108: add ofdata_to_platdata() method for driver Parse of data in dedicated api instead of in probe(). The clk_set_rate() may be called before the clk driver is probed, after core support set default clock. This patch fix system abort issue since: f4fcba5 clk: implement clk_set_defaults() Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- drivers/clk/rockchip/clk_rv1108.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c index 958fc78592..42341a8566 100644 --- a/drivers/clk/rockchip/clk_rv1108.c +++ b/drivers/clk/rockchip/clk_rv1108.c @@ -209,12 +209,19 @@ static void rkclk_init(struct rv1108_cru *cru) printf("APLL: %d DPLL:%d GPLL:%d\n", apll, dpll, gpll); } -static int rv1108_clk_probe(struct udevice *dev) +static int rv1108_clk_ofdata_to_platdata(struct udevice *dev) { struct rv1108_clk_priv *priv = dev_get_priv(dev); priv->cru = dev_read_addr_ptr(dev); + return 0; +} + +static int rv1108_clk_probe(struct udevice *dev) +{ + struct rv1108_clk_priv *priv = dev_get_priv(dev); + rkclk_init(priv->cru); return 0; @@ -260,6 +267,7 @@ U_BOOT_DRIVER(clk_rv1108) = { .id = UCLASS_CLK, .of_match = rv1108_clk_ids, .priv_auto_alloc_size = sizeof(struct rv1108_clk_priv), + .ofdata_to_platdata = rv1108_clk_ofdata_to_platdata, .ops = &rv1108_clk_ops, .bind = rv1108_clk_bind, .probe = rv1108_clk_probe, From 4749436da252df2eeeeae6a6c895b2d581a245c1 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 18 Apr 2018 11:52:34 +0800 Subject: [PATCH 13/17] rockchip: rk322x: update TPL_TEXT_BASE The boot0 hook including the 4-byte TAG which is at the beginning of the TEXT_BASE, now we can use a aligned TEXT BASE. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- include/configs/rk322x_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 7f9c7fbfd5..b437b858c3 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -22,7 +22,7 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10088000 -#define CONFIG_SPL_TEXT_BASE 0x10081004 +#define CONFIG_SPL_TEXT_BASE 0x10081000 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK32" From cb7116afe8c526aa05543b36a4722ce06dfde8ab Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 18 Apr 2018 12:45:33 +0800 Subject: [PATCH 14/17] rockchip: rk322x: update MACRO for back-to-brom The MACRO has been update after: ee14d29 rockchip: back-to-bootrom: split BACK_TO_BOOTROM for TPL/SPL We need to update the C code for it. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- arch/arm/mach-rockchip/rk322x-board-spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c index 206abfafcd..d3d0446574 100644 --- a/arch/arm/mach-rockchip/rk322x-board-spl.c +++ b/arch/arm/mach-rockchip/rk322x-board-spl.c @@ -95,7 +95,7 @@ void board_init_f(ulong dummy) /* Disable the ddr secure region setting to make it non-secure */ rk_clrreg(SGRF_DDR_CON0, 0x4000); -#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) +#if defined(CONFIG_SPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(BROM_BOOT_NEXTSTAGE); #endif } From 932b2c98ebdd274eba6840840ef75f2e555d1543 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 18 Apr 2018 18:01:21 +0800 Subject: [PATCH 15/17] Revert "rockchip: firefly: Add "usb start" to auto-start USB device" This reverts commit a1903c18db13e740e6bedb8955b3272dce5104e1. It's really bad idea to add "usb start" in preboot, it will spend a lot of time to scan usb bus, and most of people do not need this feature. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- include/configs/firefly-rk3288.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h index d6bb9f6fb4..2b0ac9ec5f 100644 --- a/include/configs/firefly-rk3288.h +++ b/include/configs/firefly-rk3288.h @@ -10,8 +10,7 @@ #define ROCKCHIP_DEVICE_SETTINGS \ "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" \ - "preboot=usb start\0" + "stderr=serial,vidconsole\0" #include From c3c0331db1fb7b1f4ff41e144fc04353b37c785c Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 19 Apr 2018 11:37:09 +0800 Subject: [PATCH 16/17] rockchip: enable SYS_NS16550 for all SoCs by default All rockchip SoCs can use ns16550 driver, enable it for all and set SYS_NS16550_MEM32 for all SoCs. Version-changes: 2 - use imply instead of select Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- arch/arm/Kconfig | 1 + arch/arm/mach-rockchip/Kconfig | 1 - include/configs/rk3036_common.h | 3 --- include/configs/rk3128_common.h | 2 -- include/configs/rk322x_common.h | 1 - include/configs/rk3288_common.h | 2 -- include/configs/rv1108_common.h | 3 --- 7 files changed, 1 insertion(+), 12 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7212fc5afa..c930fa2846 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1185,6 +1185,7 @@ config ARCH_ROCKCHIP imply TPL_SYSRESET imply ADC imply SARADC_ROCKCHIP + imply SYS_NS16550 config TARGET_THUNDERX_88XX bool "Support ThunderX 88xx" diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 0adaed4367..007cb22a34 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -103,7 +103,6 @@ config ROCKCHIP_RK3368 imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT select DEBUG_UART_BOARD_INIT - select SYS_NS16550 help The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised into a big and little cluster with 4 cores each) Cortex-A53 including diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index f39a272e6d..c5ec864b1e 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -18,9 +18,6 @@ #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10081fff diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index bd8019c6a5..c593f18fdb 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index b437b858c3..0fb72214f4 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_TIMER_BASE 0x110c00a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10088000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 9b7b24ff96..23dbfecf01 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550_MEM32 - #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM /* Bootrom will load u-boot binary to 0x0 once return from SPL */ #endif diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 349c53c289..cd204e9718 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -18,9 +18,6 @@ #define CONFIG_SYS_TIMER_BASE 0x10350020 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) From eb3d707e99fcd2213d5f8f0fe4ae53ad416b377e Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 19 Apr 2018 11:37:10 +0800 Subject: [PATCH 17/17] rockchip: defconfig: remove CONFIG_SYS_NS16550 We have enable NS16550 in Kconfig, do not need enable at defconfig Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- configs/chromebit_mickey_defconfig | 1 - configs/chromebook_jerry_defconfig | 1 - configs/chromebook_minnie_defconfig | 1 - configs/evb-rk3128_defconfig | 1 - configs/evb-rk3229_defconfig | 1 - configs/evb-rk3288_defconfig | 1 - configs/evb-rk3328_defconfig | 1 - configs/evb-rk3399_defconfig | 1 - configs/fennec-rk3288_defconfig | 1 - configs/firefly-rk3288_defconfig | 1 - configs/firefly-rk3399_defconfig | 1 - configs/miqi-rk3288_defconfig | 1 - configs/phycore-rk3288_defconfig | 1 - configs/popmetal-rk3288_defconfig | 1 - configs/puma-rk3399_defconfig | 1 - configs/rock2_defconfig | 1 - configs/rock_defconfig | 1 - configs/tinker-rk3288_defconfig | 1 - configs/vyasa-rk3288_defconfig | 1 - 19 files changed, 19 deletions(-) diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index d8ab84b8e4..d1728ef639 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -71,7 +71,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 5dabae5434..43d93f4637 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -72,7 +72,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index c54c00f484..706809ca53 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -71,7 +71,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index 5407cbaf22..796d0ec92e 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -34,7 +34,6 @@ CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index 549a16673a..710b0b4e1a 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -46,7 +46,6 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0x11030000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_GADGET=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index d625fb1c5f..7695277daf 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -64,7 +64,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index a52e37ac74..78ae24b56b 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -44,7 +44,6 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 67ba0ce015..08c0ab0e27 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -59,7 +59,6 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index d1f7f777ed..efdd583cf6 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 0f254c0972..b252d27464 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -67,7 +67,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 984c3f4ed6..19c0b11040 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -58,7 +58,6 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index af5b9cc6a4..f44537c88f 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 66decf0653..d78b6d57b6 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -67,7 +67,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 8343a4ab4d..2670b4b75a 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index b80aaaa9a7..e6539a7da8 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -85,7 +85,6 @@ CONFIG_RTC_ISL1208=y CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index a59599ebbc..cd9a821974 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -64,7 +64,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/rock_defconfig b/configs/rock_defconfig index 9112985500..08ca78d03b 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -50,7 +50,6 @@ CONFIG_RAM=y CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_ROCKCHIP_USB2_PHY=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index d5c705ae46..fb6bfa57ad 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -66,7 +66,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index bf1de5a56e..9e4e96a4f2 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y