qca: ipq806x: Adding ethernet init sequence.

1. Added Ethernet and switch init calls.
2. Added GMAC config info to Devicetree.
3. Enabled Network components in config file.

Change-Id: I1704b01ca9f991934045a2d23f52d1af0f490aab
Signed-off-by: Aditya Kumar Patra S <apatr@codeaurora.org>
This commit is contained in:
Aditya Kumar Patra S 2016-10-04 16:40:25 +05:30 committed by Gerrit - the friendly Code Review server
parent 2c97e2ff04
commit d2639a4f08
8 changed files with 345 additions and 11 deletions

View file

@ -14,11 +14,157 @@
/dts-v1/;
#include "ipq806x-soc.dtsi"
/ {
model ="QCA, IPQ806x-AK01";
compatible = "qca,ipq806x", "qca,ipq806x-ak01";
machid = <0x00000000>;
model ="QCA, IPQ806x-AP148";
compatible = "qca,ipq806x", "qca,ipq806x-ap148";
machid = <4704>;
aliases {
console = "/serial@16340000";
};
};
gmac {
gmac_gpio {
gpio0 {
gpio = <0>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio1 {
gpio = <1>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio51 {
gpio = <51>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio52 {
gpio = <52>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio59 {
gpio = <59>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio60 {
gpio = <60>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio61 {
gpio = <61>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio62 {
gpio = <62>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio27 {
gpio = <27>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio28 {
gpio = <28>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio29 {
gpio = <29>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio30 {
gpio = <30>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio31 {
gpio = <31>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio32 {
gpio = <32>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
};
gmac_cfg {
gmac_count = <2>;
gmac1_cfg {
base = <0x37200000>;
unit = <1>;
is_macsec = <1>;
mac_pwr0 = <0x00080000>;
mac_pwr1 = <0x00040000>;
mac_conn_to_phy = <0>;
phy_interface_type = <7>;
phy_address_count = <1>;
phy_address = <4>;
phy_name = "IPQ MDIO1";
};
gmac2_cfg {
base = <0x37400000>;
unit = <2>;
is_macsec = <1>;
mac_pwr0 = <0x00080000>;
mac_pwr1 = <0x00040000>;
mac_conn_to_phy = <0>;
phy_interface_type = <2>;
phy_address_count = <4>;
phy_address = <0 1 2 3>;
phy_name = "IPQ MDIO2";
};
};
};
};

View file

@ -1107,6 +1107,22 @@ extern unsigned int __machine_arch_type;
#define MACH_TYPE_COLIBRI_T30 4493
#define MACH_TYPE_APALIS_T30 4513
#define MACH_TYPE_OMAPL138_LCDK 2495
#define MACH_TYPE_IPQ806X_RUMI3 3961
#define MACH_TYPE_IPQ806X_TB726 3962
#define MACH_TYPE_IPQ806X_AP144 3963
#define MACH_TYPE_IPQ806X_DB149 4699
#define MACH_TYPE_IPQ806X_DB149_1XX 4811
#define MACH_TYPE_IPQ806X_DB147 4703
#define MACH_TYPE_IPQ806X_AP148 4704
#define MACH_TYPE_IPQ806X_AP145 4810
#define MACH_TYPE_IPQ806X_AP145_1XX 4812
#define MACH_TYPE_IPQ806X_AP148_1XX 4913
#define MACH_TYPE_IPQ806X_DB149_2XX 4917
#define MACH_TYPE_IPQ806X_STORM 4936
#define MACH_TYPE_IPQ806X_AP160 4971
#define MACH_TYPE_IPQ806X_AP160_2XX 4991
#define MACH_TYPE_IPQ806X_AP161 4972
#define MACH_TYPE_IPQ806X_AK01_1XX 5020
#define MACH_TYPE_IPQ40XX_AP_DK01_1_S1 0x8010200
#define MACH_TYPE_IPQ40XX_AP_DK01_1_C1 0x8010000
#define MACH_TYPE_IPQ40XX_AP_DK01_1_C2 0x8010100

View file

@ -43,9 +43,9 @@ int get_eth_mac_address(uchar *enetaddr, uint no_of_macs)
#endif
if (sfi->flash_type != SMEM_BOOT_MMC_FLASH) {
if (qca_smem_flash_info.flash_type == SMEM_BOOT_SPI_FLASH)
flash_type = CONFIG_IPQ_SPI_NOR_INFO_IDX;
flash_type = CONFIG_SPI_FLASH_INFO_IDX;
else if (qca_smem_flash_info.flash_type == SMEM_BOOT_NAND_FLASH)
flash_type = CONFIG_IPQ_NAND_NAND_INFO_IDX;
flash_type = CONFIG_NAND_FLASH_INFO_IDX;
else {
printf("Unknown flash type\n");
return -EINVAL;

View file

@ -15,13 +15,16 @@
#include <asm/global_data.h>
#include <asm/io.h>
#include <environment.h>
#include <fdtdec.h>
#include <asm/arch-qcom-common/gsbi.h>
#include <asm/arch-qcom-common/uart.h>
#include <asm/arch-qcom-common/gpio.h>
#include <asm/arch-qcom-common/smem.h>
#include <asm/arch-ipq806x/msm_ipq806x_gmac.h>
#include "ipq806x.h"
#include "qca_common.h"
ipq_gmac_board_cfg_t gmac_cfg[CONFIG_IPQ_NO_MACS];
DECLARE_GLOBAL_DATA_PTR;
qca_mmc mmc_host;
@ -65,6 +68,116 @@ void board_nand_init(void)
{
/* TODO: To be filled */
}
int board_eth_init(bd_t *bis)
{
int status;
int gmac_gpio_node = 0, storm_switch_gpio_node = 0;
int ak01_reset_gpio_node = 0, ak01_config_gpio_node = 0;
int gmac_cfg_node = 0, offset = 0;
unsigned int machid;
int loop = 0, inner_loop = 0;
int phy_name_len = 0;
unsigned int tmp_phy_array[8] = {0};
char *phy_name_ptr = NULL;
gmac_cfg_node = fdt_path_offset(gd->fdt_blob, "/gmac/gmac_cfg");
if (gmac_cfg_node >= 0) {
for (offset = fdt_first_subnode(gd->fdt_blob, gmac_cfg_node);
offset > 0;
offset = fdt_next_subnode(gd->fdt_blob, offset) , loop++) {
gmac_cfg[loop].base = fdtdec_get_uint(gd->fdt_blob,
offset, "base", 0);
gmac_cfg[loop].unit = fdtdec_get_uint(gd->fdt_blob,
offset, "unit", 0);
gmac_cfg[loop].is_macsec = fdtdec_get_uint(gd->fdt_blob,
offset, "is_macsec", 0);
gmac_cfg[loop].mac_pwr0 = fdtdec_get_uint(gd->fdt_blob,
offset, "mac_pwr0", 0);
gmac_cfg[loop].mac_pwr1 = fdtdec_get_uint(gd->fdt_blob,
offset, "mac_pwr1", 0);
gmac_cfg[loop].mac_conn_to_phy = fdtdec_get_uint(gd->fdt_blob,
offset, "mac_conn_to_phy", 0);
gmac_cfg[loop].phy = fdtdec_get_uint(gd->fdt_blob,
offset, "phy_interface_type", 0);
gmac_cfg[loop].phy_addr.count = fdtdec_get_uint(gd->fdt_blob,
offset, "phy_address_count", 0);
fdtdec_get_int_array(gd->fdt_blob, offset, "phy_address",
tmp_phy_array, gmac_cfg[loop].phy_addr.count);
for(inner_loop = 0; inner_loop < gmac_cfg[loop].phy_addr.count;
inner_loop++){
gmac_cfg[loop].phy_addr.addr[inner_loop] =
(char)tmp_phy_array[inner_loop];
}
phy_name_ptr = (char*)fdt_getprop(gd->fdt_blob, offset,
"phy_name", &phy_name_len);
strncpy(gmac_cfg[loop].phy_name, phy_name_ptr, phy_name_len);
}
}
gmac_cfg[loop].unit = -1;
storm_switch_gpio_node = fdt_path_offset(gd->fdt_blob,
"/storm_switch_gpio");
if (storm_switch_gpio_node) {
qca_gpio_init(storm_switch_gpio_node);
}
ipq_gmac_common_init(gmac_cfg);
gmac_gpio_node = fdt_path_offset(gd->fdt_blob, "/gmac/gmac_gpio");
if (gmac_gpio_node) {
qca_gpio_init(gmac_gpio_node);
}
/*
* Register the swith driver routines before
* initializng the GMAC
*/
machid = fdtdec_get_uint(gd->fdt_blob, 0, "machid", 0);
switch (machid) {
case MACH_TYPE_IPQ806X_AP160_2XX:
ipq_register_switch(ipq_qca8511_init);
break;
case MACH_TYPE_IPQ806X_AK01_1XX:
ak01_reset_gpio_node = fdt_path_offset(gd->fdt_blob, "/ak01_gmac_reset_gpio");
if (ak01_reset_gpio_node){
qca_gpio_init(ak01_reset_gpio_node);
}
mdelay(100);
ak01_config_gpio_node = fdt_path_offset(gd->fdt_blob, "/ak01_gmac_config_gpio");
if (ak01_config_gpio_node){
qca_gpio_init(ak01_config_gpio_node);
};
ipq_register_switch(NULL);
break;
default:
ipq_register_switch(ipq_athrs17_init);
break;
}
ipq_register_switch(ipq_athrs17_init);
status = ipq_gmac_init(gmac_cfg);
return status;
}
void qca_serial_init(struct ipq_serial_platdata *plat)
{
int serial_node, gpio_node;

View file

@ -17,11 +17,57 @@
#include <configs/ipq806x.h>
#include <asm/u-boot.h>
#include <asm/arch-qcom-common/qca_common.h>
#include "phy.h"
#define GSBI4_BASE 0x16300000
#define GSBI4_BASE 0x16300000
#define GMAC_AHB_RESET 0x903E24
#define KERNEL_AUTH_CMD 0x7
typedef struct {
uint count;
u8 addr[7];
} ipq_gmac_phy_addr_t;
typedef struct {
uint base;
int unit;
uint is_macsec;
uint mac_pwr0;
uint mac_pwr1;
uint mac_conn_to_phy;
phy_interface_t phy;
ipq_gmac_phy_addr_t phy_addr;
const char phy_name[MDIO_NAME_LEN];
} ipq_gmac_board_cfg_t;
#define gmac_board_cfg(_b, _sec, _p, _p0, _p1, _mp, _pn, ...) \
{ \
.base = NSS_GMAC##_b##_BASE, \
.unit = _b, \
.is_macsec = _sec, \
.phy = PHY_INTERFACE_MODE_##_p, \
.phy_addr = { .count = _pn, { __VA_ARGS__ } }, \
.mac_pwr0 = _p0, \
.mac_pwr1 = _p1, \
.mac_conn_to_phy = _mp, \
.phy_name = "IPQ MDIO"#_b \
}
extern ipq_gmac_board_cfg_t gmac_cfg[];
static inline int gmac_cfg_is_valid(ipq_gmac_board_cfg_t *cfg)
{
/*
* 'cfg' is valid if and only if
* unit number is non-negative and less than CONFIG_IPQ_NO_MACS.
* 'cfg' pointer lies within the array range of
* board_ipq806x_params_t->gmac_cfg[]
*/
return ((cfg >= &gmac_cfg[0]) &&
(cfg < &gmac_cfg[CONFIG_IPQ_NO_MACS]) &&
(cfg->unit >= 0) && (cfg->unit < CONFIG_IPQ_NO_MACS));
}
typedef enum {
SMEM_SPINLOCK_ARRAY = 7,
SMEM_AARM_PARTITION_TABLE = 9,

View file

@ -82,12 +82,12 @@ CONFIG_CMD_SETEXPR=y
#
# Network commands
#
CONFIG_CMD_NET=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_TFTPPUT is not set
# CONFIG_CMD_TFTPSRV is not set
# CONFIG_CMD_RARP is not set
# CONFIG_CMD_DHCP is not set
CONFIG_CMD_NFS=y
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_PING is not set
# CONFIG_CMD_CDP is not set
# CONFIG_CMD_SNTP is not set

View file

@ -24,6 +24,7 @@
#include <asm/arch-ipq806x/ipq_gmac.h>
#include <asm/arch-ipq806x/msm_ipq806x_gmac.h>
#include <asm/arch-qcom-common/gpio.h>
#include <dt-bindings/qcom/gpio-ipq806x.h>
#define ipq_info printf
#define ipq_dbg printf

View file

@ -55,13 +55,25 @@
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_NFS /* NFS support */
#undef CONFIG_CMD_NET /* network support */
#undef CONFIG_CMD_DHCP
#define CONFIG_CMD_NET /* network support */
#define CONFIG_CMD_DHCP
#undef CONFIG_SYS_MAX_FLASH_SECT
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_CMD_PING
#define CONFIG_IPQ_SNPS_GMAC
#define CONFIG_MII
#define CONFIG_CMD_MII
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_IPQ_SWITCH_ATHRS17
#define CONFIG_IPQ_SWITCH_QCA8511
#define CONFIG_SYS_RX_ETH_BUFFER 8
#define CONFIG_IPQ_NO_MACS 4
#undef CONFIG_BOARD_EARLY_INIT_F
#undef CONFIG_HW_WATCHDOG