From d054154f3c4283d1b39ac4a36745f3fdf59a7d60 Mon Sep 17 00:00:00 2001
From: Akila N <akilan@codeaurora.org>
Date: Tue, 30 Aug 2016 19:17:03 +0530
Subject: [PATCH] ipq40xx: Add edma config info to dts files

Change-Id: Ib30993cb637315d1c9967a1b5297e48101bb7e09
Signed-off-by: Akila N <akilan@codeaurora.org>
---
 arch/arm/dts/ipq40xx-dk01-c1.dts | 37 +++++++++++++++++++++++++++++++
 arch/arm/dts/ipq40xx-dk01-c2.dts | 38 ++++++++++++++++++++++++++++++++
 arch/arm/dts/ipq40xx-dk01.dtsi   |  7 ++++++
 arch/arm/dts/ipq40xx-dk04-c1.dts | 37 +++++++++++++++++++++++++++++++
 arch/arm/dts/ipq40xx-dk04.dtsi   |  7 ++++++
 include/phy.h                    |  2 ++
 6 files changed, 128 insertions(+)

diff --git a/arch/arm/dts/ipq40xx-dk01-c1.dts b/arch/arm/dts/ipq40xx-dk01-c1.dts
index 5233674f27..919d29192d 100644
--- a/arch/arm/dts/ipq40xx-dk01-c1.dts
+++ b/arch/arm/dts/ipq40xx-dk01-c1.dts
@@ -17,4 +17,41 @@
 	machid = <0x8010000>;
 	ddr_size = <256>;
 	config_name = "config@ap.dk01.1-c1";
+
+	ess-switch@c000000{
+		sw_gpio {
+			gpio1 {
+				gpio = <52>;
+				func = <2>;
+				pull = <GPIO_PULL_UP>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_DISABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+
+			gpio2 {
+				gpio = <53>;
+				func = <2>;
+				pull = <GPIO_PULL_UP>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_DISABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+
+			gpio3 {
+				gpio = <59>;
+				func = <0>;
+				pull = <GPIO_NO_PULL>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_ENABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+		};
+	};
 };
diff --git a/arch/arm/dts/ipq40xx-dk01-c2.dts b/arch/arm/dts/ipq40xx-dk01-c2.dts
index aabedf268c..f22130dfd4 100644
--- a/arch/arm/dts/ipq40xx-dk01-c2.dts
+++ b/arch/arm/dts/ipq40xx-dk01-c2.dts
@@ -18,4 +18,42 @@
 	ddr_size = <256>;
 	spi_nand_available = <1>;
 	config_name = "config@ap.dk01.1-c2";
+
+	ess-switch@c000000{
+		sw_gpio {
+			gpio1 {
+				gpio = <52>;
+				func = <2>;
+				pull = <GPIO_PULL_UP>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_DISABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+
+			gpio2 {
+				gpio = <53>;
+				func = <2>;
+				pull = <GPIO_PULL_UP>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_DISABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+
+			gpio3 {
+				gpio = <62>;
+				func = <0>;
+				pull = <GPIO_NO_PULL>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_ENABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+		};
+	};
+
 };
diff --git a/arch/arm/dts/ipq40xx-dk01.dtsi b/arch/arm/dts/ipq40xx-dk01.dtsi
index 21b45d560d..2f990d325a 100644
--- a/arch/arm/dts/ipq40xx-dk01.dtsi
+++ b/arch/arm/dts/ipq40xx-dk01.dtsi
@@ -45,5 +45,12 @@
 	spi {
 		status = "ok";
 	};
+
+	edma_cfg {
+		unit = <0>;
+		/* Based on the enum for PSGMII phy interface from include/phy.h */
+		phy = <13>;
+		phy_name = "IPQ MDIO0";
+	};
 };
 
diff --git a/arch/arm/dts/ipq40xx-dk04-c1.dts b/arch/arm/dts/ipq40xx-dk04-c1.dts
index 00acb23d22..0cffc811ed 100644
--- a/arch/arm/dts/ipq40xx-dk04-c1.dts
+++ b/arch/arm/dts/ipq40xx-dk04-c1.dts
@@ -21,4 +21,41 @@
 	sdhci@7824000 {
 		status = "ok";
 	};
+
+	ess-switch@c000000{
+		sw_gpio {
+			gpio1 {
+				gpio = <6>;
+				func = <1>;
+				pull = <GPIO_PULL_UP>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_DISABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+
+			gpio2 {
+				gpio = <7>;
+				func = <1>;
+				pull = <GPIO_PULL_UP>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_DISABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+
+			gpio3 {
+				gpio = <47>;
+				func = <0>;
+				pull = <GPIO_PULL_DOWN>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_ENABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+		};
+	};
 };
diff --git a/arch/arm/dts/ipq40xx-dk04.dtsi b/arch/arm/dts/ipq40xx-dk04.dtsi
index fe976648e1..9a35b0f255 100644
--- a/arch/arm/dts/ipq40xx-dk04.dtsi
+++ b/arch/arm/dts/ipq40xx-dk04.dtsi
@@ -407,5 +407,12 @@
 			};
 		};
 	};
+
+	edma_cfg {
+		unit = <0>;
+		/* Based on the enum for PSGMII phy interface from include/phy.h */
+		phy = <13>;
+		phy_name = "IPQ MDIO0";
+	};
 };
 
diff --git a/include/phy.h b/include/phy.h
index 66cf61bdfb..0d0febbbaf 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -51,6 +51,7 @@ typedef enum {
 	PHY_INTERFACE_MODE_RGMII_TXID,
 	PHY_INTERFACE_MODE_RTBI,
 	PHY_INTERFACE_MODE_XGMII,
+	PHY_INTERFACE_MODE_PSGMII,
 	PHY_INTERFACE_MODE_NONE,	/* Must be last */
 
 	PHY_INTERFACE_MODE_COUNT,
@@ -70,6 +71,7 @@ static const char *phy_interface_strings[] = {
 	[PHY_INTERFACE_MODE_RGMII_TXID]		= "rgmii-txid",
 	[PHY_INTERFACE_MODE_RTBI]		= "rtbi",
 	[PHY_INTERFACE_MODE_XGMII]		= "xgmii",
+	[PHY_INTERFACE_MODE_PSGMII]		= "psgmii",
 	[PHY_INTERFACE_MODE_NONE]		= "",
 };