From cdc5b97b86e63a718084d97263f445580b330c7e Mon Sep 17 00:00:00 2001 From: Vandhiadevan Karunamoorthy Date: Tue, 27 Jul 2021 17:01:39 +0530 Subject: [PATCH] ipq9574: update pcie x1 & x2 phy configuration Signed-off-by: Vandhiadevan Karunamoorthy Change-Id: I19708bfef11d48f034d2dc218f249676bc5621f7 --- drivers/pci/pci_ipq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci_ipq.c b/drivers/pci/pci_ipq.c index 83c03d18a8..d97c9e6ec9 100644 --- a/drivers/pci/pci_ipq.c +++ b/drivers/pci/pci_ipq.c @@ -452,7 +452,7 @@ static const struct phy_regs pcie_phy_v2_x2_init_seq_ipq[] = { { PCIE_0_QSERDES_PLL_CLK_SELECT, 0x00000032}, { PCIE_0_QSERDES_PLL_SYS_CLK_CTRL, 0x00000002}, { PCIE_0_QSERDES_PLL_SYSCLK_BUF_ENABLE, 0x00000007}, - { PCIE_0_QSERDES_PLL_SYSCLK_EN_SEL, 0x00000000}, + { PCIE_0_QSERDES_PLL_SYSCLK_EN_SEL, 0x00000008}, { PCIE_0_QSERDES_PLL_BG_TIMER, 0x0000000A}, { PCIE_0_QSERDES_PLL_HSCLK_SEL, 0x00000001}, { PCIE_0_QSERDES_PLL_DEC_START_MODE1, 0x00000053}, @@ -750,7 +750,7 @@ static const struct phy_regs pcie_phy_v2_init_seq_ipq[] = { { PCIE_0_QSERDES_PLL_CLK_SELECT, 0x00000032}, { PCIE_0_QSERDES_PLL_SYS_CLK_CTRL, 0x00000002}, { PCIE_0_QSERDES_PLL_SYSCLK_BUF_ENABLE, 0x00000007}, - { PCIE_0_QSERDES_PLL_SYSCLK_EN_SEL, 0x00000000}, + { PCIE_0_QSERDES_PLL_SYSCLK_EN_SEL, 0x00000008}, { PCIE_0_QSERDES_PLL_BG_TIMER, 0x0000000A}, { PCIE_0_QSERDES_PLL_HSCLK_SEL, 0x00000001}, { PCIE_0_QSERDES_PLL_DEC_START_MODE1, 0x00000053},