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ARM: qca: dts: Adding support for DK04 and DK07 boards

Browse source 
Adding support for DK04-C2,C3,C4,C5 and
DK07-C1,C2,C3 boards.

Change-Id: I2727645086328331deffd63849bedbf119d163c8
Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
This commit is contained in:
Sasirekaa Madhesu 2018-01-03 15:29:51 +05:30 • committed by Gerrit - the friendly Code Review server
parent f2d892333f
commit cc3573b68a
12 changed files with 801 additions and 240 deletions
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9
arch/arm/dts/Makefile
View file

@ -39,7 +39,14 @@ dtb-$(CONFIG_ARCH_IPQ806x) += ipq806x-ap148.dtb \
dtb-$(CONFIG_ARCH_IPQ40xx) += ipq40xx-dk01-c1.dtb \
ipq40xx-dk01-c2.dtb \
ipq40xx-dk04-c1.dtb
ipq40xx-dk04-c1.dtb \
ipq40xx-dk04-c2.dtb \
ipq40xx-dk04-c3.dtb \
ipq40xx-dk04-c4.dtb \
ipq40xx-dk04-c5.dtb \
ipq40xx-dk07-c1.dtb \
ipq40xx-dk07-c2.dtb \
ipq40xx-dk07-c3.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly.dtb \

53
arch/arm/dts/ipq40xx-dk04-c1.dts
View file

@ -13,6 +13,7 @@
/dts-v1/;
#include "ipq40xx-dk04.dtsi"
#include "nand_gpio.dtsi"
/ {
machid = <0x8010001>;
ddr_size = <256>;
@ -22,6 +23,22 @@
uart2 = "/serial@78b0000";
};
nand@79B0000 {
status = "ok";
nand_gpio {
gpio18 {
gpio = <61>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
sdhci@7824000 {
status = "ok";
};
@ -43,41 +60,5 @@
};
};
};
ess-switch@c000000{
sw_gpio {
gpio1 {
gpio = <6>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <7>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <47>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_ENABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
};

58
arch/arm/dts/ipq40xx-dk04-c2.dts Normal file
View file

@ -0,0 +1,58 @@
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk04.dtsi"
/ {
machid = <0x8010101>;
ddr_size = <256>;
config_name = "config@ap.dk04.1-c2";
aliases {
uart2 = "/serial@78b0000";
};
serial@78b0000 {
status = "ok";
serial_gpio {
gpio1 {
gpio = <8>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <9>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
};
};
ess-switch@c000000{
sw_gpio {
gpio3 {
gpio = <67>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_ENABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
};

25
arch/arm/dts/ipq40xx-dk04-c3.dts Normal file
View file

@ -0,0 +1,25 @@
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk04.dtsi"
/ {
machid = <0x8010201>;
ddr_size = <256>;
config_name = "config@ap.dk04.1-c3";
sdhci@7824000 {
status = "ok";
};
};

60
arch/arm/dts/ipq40xx-dk04-c4.dts Normal file
View file

@ -0,0 +1,60 @@
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk04.dtsi"
#include "nand_gpio.dtsi"
/ {
machid = <0x8010301>;
ddr_size = <256>;
config_name = "config@ap.dk04.1-c4";
aliases {
uart2 = "/serial@78b0000";
};
nand@79B0000 {
status = "ok";
nand_gpio {
gpio18 {
gpio = <61>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
serial@78b0000 {
status = "ok";
serial_gpio {
gpio1 {
gpio = <8>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <9>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
};
};
};

60
arch/arm/dts/ipq40xx-dk04-c5.dts Normal file
View file

@ -0,0 +1,60 @@
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk04.dtsi"
#include "nand_gpio.dtsi"
/ {
machid = <0x8010401>;
ddr_size = <256>;
config_name = "config@ap.dk04.1-c5";
aliases {
uart2 = "/serial@78b0000";
};
nand@79B0000 {
status = "ok";
nand_gpio {
gpio18 {
gpio = <61>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
serial@78b0000 {
status = "ok";
serial_gpio {
gpio1 {
gpio = <8>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <9>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
};
};
};

239
arch/arm/dts/ipq40xx-dk04.dtsi
View file

@ -92,209 +92,6 @@
};
};
nand@79B0000 {
status = "ok";
nand_gpio {
gpio1 {
gpio = <52>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <53>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <54>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <55>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio5 {
gpio = <56>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio6 {
gpio = <57>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio7 {
gpio = <58>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio8 {
gpio = <59>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio9 {
gpio = <60>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio10 {
gpio = <61>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio11 {
gpio = <62>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio12 {
gpio = <63>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio13 {
gpio = <64>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio14 {
gpio = <65>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio15 {
gpio = <66>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio16 {
gpio = <67>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio17 {
gpio = <68>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio18 {
gpio = <69>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
sdhci@7824000 {
mmc_gpio {
gpio1 {
@ -475,5 +272,41 @@
};
};
};
ess-switch@c000000{
sw_gpio {
gpio1 {
gpio = <6>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <7>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <47>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_ENABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
};

69
arch/arm/dts/ipq40xx-dk07-c1.dts Normal file
View file

@ -0,0 +1,69 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk07.dtsi"
/ {
machid = <0x8010006>;
ddr_size = <512>;
config_name = "config@ap.dk07.1-c1";
spi {
status = "ok";
spi_gpio {
gpio1 {
gpio = <12>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <13>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <14>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <15>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
};

20
arch/arm/dts/ipq40xx-dk07-c2.dts Normal file
View file

@ -0,0 +1,20 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk07.dtsi"
/ {
machid = <0x8010106>;
ddr_size = <512>;
config_name = "config@ap.dk07.1-c2";
};

20
arch/arm/dts/ipq40xx-dk07-c3.dts Normal file
View file

@ -0,0 +1,20 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk07.dtsi"
/ {
machid = <0x8010206>;
ddr_size = <512>;
config_name = "config@ap.dk07.1-c1";
};

220
arch/arm/dts/ipq40xx-dk07.dtsi Normal file
View file

@ -0,0 +1,220 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "ipq40xx-soc.dtsi"
#include <dt-bindings/qcom/gpio-ipq40xx.h>
#include "nand_gpio.dtsi"
/ {
model ="QCA, IPQ40xx-DK07";
compatible = "qca,ipq40xx", "qca,ipq40xx-dk07";
aliases {
console = "/serial@78af000";
xhci0 = "/xhci@8a00000";
xhci1 = "/xhci@6000000";
i2c0 = "/i2c@78b7000";
pci0 = "/pci@40000000";
};
serial@78af000 {
serial_gpio {
gpio1 {
gpio = <16>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <17>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
};
};
sdhci@7824000 {
mmc_gpio {
gpio1 {
gpio = <23>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <24>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <25>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <26>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio5 {
gpio = <27>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_16MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio6 {
gpio = <28>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
edma_cfg {
unit = <0>;
/* Based on the enum for PSGMII phy interface from include/phy.h */
phy = <13>;
phy_name = "IPQ MDIO0";
};
i2c0 {
i2c_gpio {
gpio1 {
gpio = <20>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <21>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
};
};
ess-switch@c000000{
sw_gpio {
gpio1 {
gpio = <6>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <7>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <41>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_ENABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
/* overriding the default configuration of gpio52 */
gpio = <52>;
func = <0>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
pci@40000000 {
status = "ok";
pci_gpio {
gpio1 {
gpio = <38>;
func = <0>;
out = <GPIO_OUT_HIGH>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_ENABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <40>;
func = <0>;
out = <GPIO_OUT_LOW>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
};

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arch/arm/dts/nand_gpio.dtsi Normal file
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/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "ipq40xx-soc.dtsi"
#include <dt-bindings/qcom/gpio-ipq40xx.h>
/ {
nand@79B0000 {
status = "ok";
nand_gpio {
gpio1 {
gpio = <52>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <53>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <54>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <55>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio5 {
gpio = <56>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio6 {
gpio = <57>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio7 {
gpio = <58>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio8 {
gpio = <59>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio9 {
gpio = <60>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio10 {
gpio = <62>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio11 {
gpio = <63>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio12 {
gpio = <64>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio13 {
gpio = <65>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio14 {
gpio = <66>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio15 {
gpio = <67>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio16 {
gpio = <68>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio17 {
gpio = <69>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
};