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omap4: Use a smaller M,N couple for IVA DPLL

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This reduced M,N couple corresponds to the advised value from
TI HW team.

Tested on 4460 Pandaboard, it also provides peripheral clocks
closer to the advised values.

Signed-off-by: Sebastien Jan <s-jan@ti.com>
This commit is contained in:
Sebastien Jan 2012-06-13 05:16:40 +00:00 • committed by Albert ARIBAUD
parent b78375a806
commit cc009defa4
1 changed files with 1 additions and 1 deletions
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2
arch/arm/cpu/armv7/omap4/clocks.c
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@ -146,7 +146,7 @@ static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = {
{727, 14, -1, -1, 4, 7, -1, -1}, /* 19.2 MHz */
{931, 25, -1, -1, 4, 7, -1, -1}, /* 26 MHz */
{931, 26, -1, -1, 4, 7, -1, -1}, /* 27 MHz */
{412, 16, -1, -1, 4, 7, -1, -1} /* 38.4 MHz */
{291, 11, -1, -1, 4, 7, -1, -1} /* 38.4 MHz */
};
/* ABE M & N values with sys_clk as source */