mirror/u-boot-2016
1
0
Fork 0
mirror of https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git synced 2026-03-14 21:10:27 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

clk: renesas: Add R8A77965 M3N entries

Browse source 
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut 2018-02-26 10:35:15 +01:00 • committed by Marek Vasut
parent f295a5697e
commit c6d99986f0
1 changed files with 19 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
drivers/clk/renesas/r8a7796-cpg-mssr.c
View file

@ -323,11 +323,30 @@ static const struct cpg_mssr_info r8a7796_cpg_mssr_info = {
.get_pll_config = r8a7796_get_pll_config,
};
static const struct cpg_mssr_info r8a77965_cpg_mssr_info = {
.core_clk = r8a7796_core_clks,
.core_clk_size = ARRAY_SIZE(r8a7796_core_clks),
.mod_clk = r8a7796_mod_clks,
.mod_clk_size = ARRAY_SIZE(r8a7796_mod_clks),
.mstp_table = r8a7796_mstp_table,
.mstp_table_size = ARRAY_SIZE(r8a7796_mstp_table),
.reset_node = "renesas,r8a77965-rst",
.extalr_node = "extalr",
.mod_clk_base = MOD_CLK_BASE,
.clk_extal_id = CLK_EXTAL,
.clk_extalr_id = CLK_EXTALR,
.get_pll_config = r8a7796_get_pll_config,
};
static const struct udevice_id r8a7796_clk_ids[] = {
{
.compatible = "renesas,r8a7796-cpg-mssr",
.data = (ulong)&r8a7796_cpg_mssr_info,
},
{
.compatible = "renesas,r8a77965-cpg-mssr",
.data = (ulong)&r8a77965_cpg_mssr_info,
},
{ }
};