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Merge "dts: ipq6018: Add support for CP02-C1"

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Linux Build Service Account 2019-04-03 16:08:50 -07:00 • committed by Gerrit - the friendly Code Review server
commit be5e618364
5 changed files with 230 additions and 15 deletions
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5
arch/arm/dts/Makefile
View file

@ -61,8 +61,9 @@ dtb-$(CONFIG_ARCH_IPQ40xx) += ipq40xx-dk01-c1.dtb \
ipq40xx-dk01-s1.dtb \
ipq40xx-dk06-c1.dtb
dtb-$(CONFIG_ARCH_IPQ6018) += ipq6018-cp01.dtb \
ipq6018-emulation.dtb
dtb-$(CONFIG_ARCH_IPQ6018) += ipq6018-cp01-c1.dtb \
ipq6018-cp02-c1.dtb \
ipq6018-emulation.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly.dtb \

15
arch/arm/dts/ipq6018-cp01.dts → arch/arm/dts/ipq6018-cp01-c1.dts
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -14,12 +14,15 @@
/dts-v1/;
#include "ipq6018-soc.dtsi"
/ {
model ="QCA, IPQ6018-CP01";
compatible = "qca,ipq6018", "qca,ipq6018-cp01";
machid = <0x08010001>;
model ="QCA, IPQ6018-CP01-C1";
compatible = "qca,ipq6018", "qca,ipq6018-cp01-c1";
machid = <0x8030000>;
config_name = "config@cp01-c1";
aliases {
console = "/serial@78B3000";
console = "/serial@78B1000";
pci0 = "/pci@20000000";
usb0 = "/xhci@8a00000";
usb1 = "/xhci@7000000";
};
};

28
arch/arm/dts/ipq6018-cp02-c1.dts Normal file
View file

@ -0,0 +1,28 @@
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq6018-soc.dtsi"
/ {
model ="QCA, IPQ6018-CP02-c1";
compatible = "qca,ipq6018", "qca,ipq6018-cp02-c1";
machid = <0x8030100>;
config_name = "config@cp02-c1";
aliases {
console = "/serial@78B1000";
mmc = "/sdhci@7804000";
pci0 = "/pci@20000000";
usb0 = "/xhci@8a00000";
};
};

34
arch/arm/dts/ipq6018-emulation.dts
View file

@ -67,7 +67,39 @@
wr_pipe_1 = <14>;
rd_pipe_1 = <15>;
status = "ok";
spi_gpio {};
spi_gpio {
gpio1 {
gpio = <38>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio2 {
gpio = <39>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio3 {
gpio = <40>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio4 {
gpio = <41>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
};
spi_nand {
bus-num = <1>;
cs = <0>;

163
arch/arm/dts/ipq6018-soc.dtsi
View file

@ -16,22 +16,22 @@
/ {
serial@78B3000 {
serial@78B1000 {
compatible = "qca,ipq-uartdm";
reg = <0x78B3000 0x200>;
reg = <0x78B1000 0x200>;
id = <4>;
bit_rate = <0xee>;
serial_gpio {
gpio1 {
gpio = <23>;
func = <2>;
gpio = <44>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <24>;
func = <2>;
gpio = <45>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
@ -65,6 +65,157 @@
reg = <0x7000000 0xcd00>;
};
spi {
status = "ok";
compatible = "qcom,spi-qup-v2.7.0";
wr_pipe_0 = <12>;
rd_pipe_0 = <13>;
spi_gpio {
gpio1 {
gpio = <38>;
func = <3>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio2 {
gpio = <39>;
func = <3>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio3 {
gpio = <40>;
func = <2>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio4 {
gpio = <41>;
func = <2>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
};
};
nand: nand-controller@79B0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,qpic-nand.1.5.20";
reg = <0x79B0000 0x10000>;
nand_gpio {
gpio1 {
gpio = <1>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio2 {
gpio = <3>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio3 {
gpio = <4>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio4 {
gpio = <5>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio5 {
gpio = <6>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio6 {
gpio = <7>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio7 {
gpio = <8>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio8 {
gpio = <10>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio9 {
gpio = <11>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio10 {
gpio = <12>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio11 {
gpio = <13>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio12 {
gpio = <14>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio13 {
gpio = <15>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio14 {
gpio = <17>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
};
};
};
pci@20000000 {
compatible = "qcom,ipq6018-pcie";
#address-cells = <1>;