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Merge "ipq5018: Tiny U-boot: Add thumb2 support"

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Linux Build Service Account 2020-05-06 10:10:56 -07:00 • committed by Gerrit - the friendly Code Review server
commit bcb64aee5b
11 changed files with 97 additions and 20 deletions
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10
board/ipq5018/Kconfig
View file

@ -36,5 +36,13 @@ config QPIC_SERIAL
config IPQ_TINY
bool "Enable Tiny support for ipq5018"
endif
config IPQ_MTD_NOR
bool "Register nor in MTD framework for ipq5018"
config IPQ_TINY_SPI_NOR
bool "This config helps to update spi-nor related updated in ipq5018"
config NAND_FLASH
bool "Enable NAND driver for ipq5018"
endif

9
board/qca/arm/common/board_init.c
View file

@ -24,10 +24,11 @@
#include <sdhci.h>
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_ENV_IS_IN_NAND
extern int nand_env_device;
extern env_t *nand_env_ptr;
extern char *nand_env_name_spec;
#endif
extern char *sf_env_name_spec;
extern int nand_saveenv(void);
extern int sf_saveenv(void);
@ -138,12 +139,16 @@ int board_init(void)
#ifndef CONFIG_ENV_IS_NOWHERE
switch (sfi->flash_type) {
#ifdef CONFIG_ENV_IS_IN_NAND
case SMEM_BOOT_NAND_FLASH:
case SMEM_BOOT_QSPI_NAND_FLASH:
nand_env_device = CONFIG_NAND_FLASH_INFO_IDX;
break;
#endif
case SMEM_BOOT_SPI_FLASH:
#ifdef CONFIG_ENV_IS_IN_NAND
nand_env_device = CONFIG_SPI_FLASH_INFO_IDX;
#endif
break;
case SMEM_BOOT_MMC_FLASH:
case SMEM_BOOT_NO_FLASH:
@ -196,9 +201,11 @@ int board_init(void)
env_name_spec = mmc_env_name_spec;
#endif
} else {
#ifdef CONFIG_ENV_IS_IN_NAND
saveenv = nand_saveenv;
env_ptr = nand_env_ptr;
env_name_spec = nand_env_name_spec;
#endif
}
#endif
ret = ipq_board_usb_init();

9
board/qca/arm/common/crashdump.c
View file

@ -118,8 +118,9 @@ struct crashdump_flash_emmc_cxt {
};
#endif
#ifdef CONFIG_MTD_DEVICE
static struct crashdump_flash_nand_cxt crashdump_nand_cnxt;
#endif
#ifdef CONFIG_QCA_SPI
static struct spi_flash *crashdump_spi_flash;
static struct crashdump_flash_spi_cxt crashdump_flash_spi_cnxt;
@ -734,7 +735,7 @@ void dump_func(unsigned int dump_level)
reset:
reset_board();
}
#ifdef CONFIG_MTD_DEVICE
/*
* Init function for NAND flash writing. It intializes its own context
* and erases the required sectors
@ -879,7 +880,7 @@ int crashdump_nand_flash_write_data(void *cnxt,
return 0;
}
#endif
#ifdef CONFIG_QCA_SPI
/* Init function for SPI NOR flash writing. It erases the required sectors */
int init_crashdump_spi_flash_write(void *cnxt,
@ -1121,11 +1122,13 @@ static int qca_wdt_write_crashdump_data(
*/
if (((flash_type == SMEM_BOOT_NAND_FLASH) ||
(flash_type == SMEM_BOOT_QSPI_NAND_FLASH))) {
#ifdef CONFIG_MTD_DEVICE
crashdump_cnxt = (void *)&crashdump_nand_cnxt;
crashdump_flash_write_init = init_crashdump_nand_flash_write;
crashdump_flash_write = crashdump_nand_flash_write_data;
crashdump_flash_write_deinit =
deinit_crashdump_nand_flash_write;
#endif
#ifdef CONFIG_QCA_SPI
} else if (flash_type == SMEM_BOOT_SPI_FLASH) {
if (!crashdump_spi_flash) {

8
board/qca/arm/common/env.c
View file

@ -18,10 +18,10 @@
#ifdef CONFIG_SDHCI_SUPPORT
#include <sdhci.h>
#endif
#ifdef CONFIG_ENV_IS_IN_NAND
extern void nand_env_relocate_spec(void);
extern int nand_env_init(void);
#endif
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
extern void sf_env_relocate_spec(void);
extern int sf_env_init(void);
@ -58,7 +58,9 @@ int env_init(void)
ret = mmc_env_init();
#endif
} else {
#ifdef CONFIG_ENV_IS_IN_NAND
ret = nand_env_init();
#endif
}
return ret;
@ -85,7 +87,9 @@ void env_relocate_spec(void)
mmc_env_relocate_spec();
#endif
} else {
#ifdef CONFIG_ENV_IS_IN_NAND
nand_env_relocate_spec();
#endif
}
};

23
board/qca/arm/common/ethaddr.c
View file

@ -19,6 +19,10 @@
#include <asm/arch-qca-common/smem.h>
#include <asm/arch-qca-common/qca_common.h>
#include <sdhci.h>
#ifdef CONFIG_IPQ_TINY_SPI_NOR
#include <spi.h>
#include <spi_flash.h>
#endif
#ifdef CONFIG_QCA_MMC
#ifndef CONFIG_SDHCI_SUPPORT
@ -46,6 +50,10 @@ int get_eth_mac_address(uchar *enetaddr, uint no_of_macs)
struct mmc *mmc;
char mmc_blks[512];
#endif
#ifdef CONFIG_IPQ_TINY_SPI_NOR
struct spi_flash *flash = NULL;
#endif
if (sfi->flash_type != SMEM_BOOT_MMC_FLASH) {
if (qca_smem_flash_info.flash_type == SMEM_BOOT_SPI_FLASH)
flash_type = CONFIG_SPI_FLASH_INFO_IDX;
@ -70,8 +78,23 @@ int get_eth_mac_address(uchar *enetaddr, uint no_of_macs)
art_offset =
((loff_t) qca_smem_flash_info.flash_block_size * start_blocks);
#ifdef CONFIG_IPQ_TINY_SPI_NOR
flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS,
CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE);
if (flash == NULL){
printf("No SPI flash device found\n");
ret = -1;
} else {
ret = spi_flash_read(flash, art_offset, length, enetaddr);
}
/*
* Avoid unused warning
*/
(void)flash_type;
#else
ret = nand_read(&nand_info[flash_type],
art_offset, &length, enetaddr);
#endif
if (ret < 0)
printf("ART partition read failed..\n");
#ifdef CONFIG_QCA_MMC

8
board/qca/arm/ipq5018/ipq5018.c
View file

@ -17,7 +17,6 @@
#include <asm/errno.h>
#include <environment.h>
#include <fdtdec.h>
#include <asm/arch-qca-common/qpic_nand.h>
#include <asm/arch-qca-common/gpio.h>
#include <asm/arch-qca-common/uart.h>
#include <asm/arch-qca-common/scm.h>
@ -30,6 +29,9 @@
#ifdef CONFIG_USB_XHCI_IPQ
#include <usb.h>
#endif
#ifdef CONFIG_QPIC_NAND
#include <asm/arch-qca-common/qpic_nand.h>
#endif
#define DLOAD_MAGIC_COOKIE 0x10
#define DLOAD_DISABLED 0x40
@ -42,7 +44,9 @@ DECLARE_GLOBAL_DATA_PTR;
struct sdhci_host mmc_host;
#endif
#ifdef CONFIG_IPQ_MTD_NOR
extern int ipq_spi_init(u16);
#endif
const char *rsvd_node = "/reserved-memory";
const char *del_node[] = {"uboot",
@ -528,7 +532,9 @@ void board_nand_init(void)
gpio_node = fdt_path_offset(gd->fdt_blob, "/spi/spi_gpio");
if (gpio_node >= 0) {
qca_gpio_init(gpio_node);
#ifdef CONFIG_IPQ_MTD_NOR
ipq_spi_init(CONFIG_IPQ_SPI_NOR_INFO_IDX);
#endif
}
#endif
}

2
common/Makefile
View file

@ -141,7 +141,9 @@ obj-$(CONFIG_CMD_MMC) += cmd_mmc.o
obj-$(CONFIG_CMD_MMC_SPI) += cmd_mmc_spi.o
obj-$(CONFIG_MP) += cmd_mp.o
obj-$(CONFIG_CMD_MTDPARTS) += cmd_mtdparts.o
ifndef CONFIG_IPQ_TINY
obj-$(CONFIG_CMD_NAND) += cmd_nand.o
endif
obj-$(CONFIG_CMD_NET) += cmd_net.o
obj-$(CONFIG_CMD_ONENAND) += cmd_onenand.o
obj-$(CONFIG_CMD_OTP) += cmd_otp.o

3
configs/ipq5018_defconfig
View file

@ -209,6 +209,7 @@ CONFIG_MMC_FLASH=y
#
# Generic NAND options
#
CONFIG_NAND_FLASH=y
#
# Serial NAND
@ -223,6 +224,8 @@ CONFIG_QPIC_SERIAL=y
# CONFIG_DM_ETH is not set
# CONFIG_PHYLIB is not set
# CONFIG_NETDEVICES is not set
CONFIG_IPQ_MTD_NOR=y
# CONFIG_IPQ_TINY_SPI_NOR is not set
#
# PCI

8
configs/ipq5018_tiny_defconfig
View file

@ -209,6 +209,7 @@ CONFIG_SIMPLE_BUS=y
#
# Generic NAND options
#
# CONFIG_NAND_FLASH is not set
#
# Serial NAND
@ -223,6 +224,8 @@ CONFIG_SIMPLE_BUS=y
# CONFIG_DM_ETH is not set
# CONFIG_PHYLIB is not set
# CONFIG_NETDEVICES is not set
# CONFIG_IPQ_MTD_NOR is not set
CONFIG_IPQ_TINY_SPI_NOR=y
#
# PCI
@ -322,3 +325,8 @@ CONFIG_LZMA=y
# CONFIG_ERRNO_STR is not set
# CONFIG_UNIT_TEST is not set
#
# Thumb2 mode support
#
CONFIG_SYS_THUMB_BUILD=y
CONFIG_HAS_THUMB2=y

5
drivers/mtd/nand/Makefile
View file

@ -27,6 +27,9 @@ else # not spl
NORMAL_DRIVERS=y
ifdef CONFIG_IPQ_TINY
obj-y += nand.o
else
obj-y += nand.o
obj-y += nand_bbt.o
obj-y += nand_ids.o
@ -34,7 +37,7 @@ obj-y += nand_util.o
obj-y += nand_ecc.o
obj-y += nand_base.o
obj-y += nand_timings.o
endif
endif # not spl
ifdef NORMAL_DRIVERS

32
include/configs/ipq5018.h
View file

@ -24,7 +24,6 @@
#define CONFIG_SPI_FLASH_CYPRESS
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_CMD_CACHE
#define CONFIG_IPQ_NO_RELOC
#define CONFIG_SYS_VSNPRINTF
@ -138,8 +137,6 @@ extern loff_t board_env_size;
#define CONFIG_ENV_RANGE board_env_range
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE_MAX + (1024 << 10))
#define CONFIG_ENV_IS_IN_NAND 1
/*
* NAND Flash Configs
*/
@ -148,11 +145,19 @@ extern loff_t board_env_size;
* CONFIG_IPQ_NAND: QPIC NAND in FIFO/block mode.
* BAM is enabled by default.
*/
#define CONFIG_QPIC_NAND
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_YAFFS
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_CMD_MTDPARTS
#ifdef CONFIG_NAND_FLASH
#define CONFIG_ENV_IS_IN_NAND 1
#define CONFIG_QPIC_NAND
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_CMD_NAND_YAFFS
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#endif
#ifdef CONFIG_QPIC_SERIAL
#define CONFIG_PAGE_SCOPE_MULTI_PAGE_READ
#endif
@ -177,7 +182,6 @@ extern loff_t board_env_size;
#define CONFIG_IPQ_4B_ADDR_SWITCH_REQD
#define CONFIG_QUP_SPI_USE_DMA 1
#define CONFIG_EFI_PARTITION
#define CONFIG_QCA_BAM 1
/*
@ -194,6 +198,7 @@ extern loff_t board_env_size;
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SDHCI_SUPPORT
#define CONFIG_MMC_ADMA
#define CONFIG_EFI_PARTITION
/*
* eMMC controller support only 4-bit
* force SDHC driver to 4-bit mode
@ -294,14 +299,13 @@ extern loff_t board_env_size;
#define CONFIG_BOOTDELAY 2
#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define NUM_ALT_PARTITION 16
#define CONFIG_RBTREE
#ifndef CONFIG_IPQ_TINY
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_CACHE
#endif
#define CONFIG_FDT_FIXUP_PARTITIONS
#define CONFIG_IPQ_FDT_FIXUP
@ -353,7 +357,13 @@ extern loff_t board_env_size;
*/
#ifdef CONFIG_UBI_WRITE
#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
#define IPQ_UBI_VOL_WRITE_SUPPORT
#endif
#undef CONFIG_BOOTM_NETBSD
#undef CONFIG_BOOTM_PLAN9
#undef CONFIG_BOOTM_RTEMS
#undef CONFIG_BOOTM_VXWORKS
#endif /* _IPQ5018_H */