qca: ipq806x: Devicetree changes for ethernet support.

1. Added ethernet support for DB149
2. Added gmac_gpio node to aliases, to make
   it common across the boards

Change-Id: I18a3d3ebaac993635830d36bd7c51f91ebd6749b
Signed-off-by: Aditya Kumar Patra S <apatr@codeaurora.org>
This commit is contained in:
Aditya Kumar Patra S 2016-11-02 10:48:43 +05:30
parent 89d3427cfc
commit b917394e6f
5 changed files with 271 additions and 145 deletions

View file

@ -22,9 +22,40 @@
aliases {
console = "/serial@16340000";
nand = "/nand@1A600000";
gmac_gpio = "/gmac1_gpio";
};
serial@16340000 {
status = "ok";
};
gmac_cfg {
gmac_count = <2>;
gmac1_cfg {
base = <0x37200000>;
unit = <1>;
is_macsec = <1>;
mac_pwr0 = <0x00080000>;
mac_pwr1 = <0x00040000>;
mac_conn_to_phy = <0>;
phy_interface_type = <7>;
phy_address_count = <1>;
phy_address = <4>;
phy_name = "IPQ MDIO1";
};
gmac2_cfg {
base = <0x37400000>;
unit = <2>;
is_macsec = <1>;
mac_pwr0 = <0x00080000>;
mac_pwr1 = <0x00040000>;
mac_conn_to_phy = <0>;
phy_interface_type = <2>;
phy_address_count = <4>;
phy_address = <0 1 2 3>;
phy_name = "IPQ MDIO2";
};
};
};

View file

@ -22,9 +22,66 @@
aliases {
console = "/serial@12490000";
nand = "/nand@1A600000";
gmac_gpio = "/gmac0_gpio";
};
serial@12490000 {
status = "ok";
};
gmac_cfg {
gmac_count = <2>;
gmac1_cfg {
base = <0x37000000>;
unit = <0>;
is_macsec = <0>;
mac_pwr0 = <0>;
mac_pwr1 = <0>;
mac_conn_to_phy = <0>;
phy_interface_type = <7>;
phy_address_count = <1>;
phy_address = <4>;
phy_name = "IPQ MDIO0";
};
gmac2_cfg {
base = <0x37200000>;
unit = <1>;
is_macsec = <1>;
mac_pwr0 = <0>;
mac_pwr1 = <0>;
mac_conn_to_phy = <0>;
phy_interface_type = <2>;
phy_address_count = <4>;
phy_address = <0 1 2 3>;
phy_name = "IPQ MDIO1";
};
gmac3_cfg {
base = <0x37400000>;
unit = <2>;
is_macsec = <1>;
mac_pwr0 = <0>;
mac_pwr1 = <0>;
mac_conn_to_phy = <1>;
phy_interface_type = <2>;
phy_address_count = <1>;
phy_address = <6>;
phy_name = "IPQ MDIO2";
};
gmac4_cfg {
base = <0x37600000>;
unit = <3>;
is_macsec = <1>;
mac_pwr0 = <0>;
mac_pwr1 = <0>;
mac_conn_to_phy = <1>;
phy_interface_type = <2>;
phy_address_count = <1>;
phy_address = <7>;
phy_name = "IPQ MDIO3";
};
};
};

View file

@ -96,150 +96,188 @@
timer_load_val = <0x00000000 0xFFFFFFFF>;
};
gmac {
gmac_gpio {
gpio0 {
gpio = <0>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio1 {
gpio = <1>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio51 {
gpio = <51>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio52 {
gpio = <52>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio59 {
gpio = <59>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio60 {
gpio = <60>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio61 {
gpio = <61>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio62 {
gpio = <62>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio27 {
gpio = <27>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio28 {
gpio = <28>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio29 {
gpio = <29>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio30 {
gpio = <30>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio31 {
gpio = <31>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio32 {
gpio = <32>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gmac0_gpio {
gpio0 {
gpio = <0>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gmac_cfg {
gmac_count = <2>;
gmac1_cfg {
base = <0x37200000>;
unit = <1>;
is_macsec = <1>;
mac_pwr0 = <0x00080000>;
mac_pwr1 = <0x00040000>;
mac_conn_to_phy = <0>;
phy_interface_type = <7>;
phy_address_count = <1>;
phy_address = <4>;
phy_name = "IPQ MDIO1";
};
gmac2_cfg {
base = <0x37400000>;
unit = <2>;
is_macsec = <1>;
mac_pwr0 = <0x00080000>;
mac_pwr1 = <0x00040000>;
mac_conn_to_phy = <0>;
phy_interface_type = <2>;
phy_address_count = <4>;
phy_address = <0 1 2 3>;
phy_name = "IPQ MDIO2";
};
gpio1 {
gpio = <1>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <2>;
func = <0>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio66 {
gpio = <66>;
func = <0>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_16MA>;
oe = <GPIO_OE_DISABLE>;
};
};
gmac1_gpio {
gpio0 {
gpio = <0>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio1 {
gpio = <1>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio51 {
gpio = <51>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio52 {
gpio = <52>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio59 {
gpio = <59>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio60 {
gpio = <60>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio61 {
gpio = <61>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio62 {
gpio = <62>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio27 {
gpio = <27>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio28 {
gpio = <28>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio29 {
gpio = <29>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio30 {
gpio = <30>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio31 {
gpio = <31>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio32 {
gpio = <32>;
func = <2>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
};
gmac3_gpio {
gpio0 {
gpio = <0>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio1 {
gpio = <1>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <2>;
func = <0>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
gpio32 {
gpio = <32>;
func = <0>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_DISABLE>;
};
};
nand@1A600000 {
@ -247,7 +285,7 @@
#size-cells = <0>;
compatible = "qcom,ebi2-nand";
reg = <0x1A600000 0x10000>,
<0x1AC00000 0x10000>;
<0x1AC00000 0x10000>;
reg-names = "EBI2_CR", "EBI2ND";
status = "ok";
nand_gpio {

View file

@ -152,7 +152,7 @@ int board_eth_init(bd_t *bis)
unsigned int tmp_phy_array[8] = {0};
char *phy_name_ptr = NULL;
gmac_cfg_node = fdt_path_offset(gd->fdt_blob, "/gmac/gmac_cfg");
gmac_cfg_node = fdt_path_offset(gd->fdt_blob, "/gmac_cfg");
if (gmac_cfg_node >= 0) {
for (offset = fdt_first_subnode(gd->fdt_blob, gmac_cfg_node);
offset > 0;
@ -208,7 +208,7 @@ int board_eth_init(bd_t *bis)
ipq_gmac_common_init(gmac_cfg);
gmac_gpio_node = fdt_path_offset(gd->fdt_blob, "/gmac/gmac_gpio");
gmac_gpio_node = fdt_path_offset(gd->fdt_blob, "gmac_gpio");
if (gmac_gpio_node) {
qca_gpio_init(gmac_gpio_node);
}

View file

@ -856,7 +856,7 @@ int ipq_gmac_init(ipq_gmac_board_cfg_t *gmac_cfg)
goto failed;
memset(bb_nodes[i], 0, sizeof(struct bitbang_nodes));
gmac_gpio_node = fdt_path_offset(gd->fdt_blob, "/gmac/gmac_gpio");
gmac_gpio_node = fdt_path_offset(gd->fdt_blob, "gmac_gpio");
if (gmac_gpio_node >= 0) {
offset = fdt_first_subnode(gd->fdt_blob, gmac_gpio_node);
bb_nodes[i]->mdio = fdtdec_get_uint(gd->fdt_blob, offset, "gpio", 0);