From b8f8d408271b593c925361e15ca8eaaea82f337f Mon Sep 17 00:00:00 2001 From: Sham Muthayyan Date: Thu, 31 May 2018 16:00:15 +0530 Subject: [PATCH] ipq807x: Add qca8081 phy support Change-Id: I09093ee3351066aa55f70012459512ae4cbcb23f Signed-off-by: Sham Muthayyan --- drivers/net/Makefile | 1 + drivers/net/ipq_common/ipq_qca8081.c | 112 +++++++++++++++++++++++++++ drivers/net/ipq_common/ipq_qca8081.h | 48 ++++++++++++ include/configs/ipq807x.h | 1 + 4 files changed, 162 insertions(+) create mode 100644 drivers/net/ipq_common/ipq_qca8081.c create mode 100644 drivers/net/ipq_common/ipq_qca8081.h diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 0715f52e4f..1b715bd510 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -86,4 +86,5 @@ obj-$(CONFIG_IPQ807X_EDMA) += ipq807x/ipq807x_uniphy.o obj-$(CONFIG_IPQ_MDIO) += ipq_common/ipq_mdio.o obj-$(CONFIG_QCA8075_PHY) += ipq_common/ipq_qca8075.o obj-$(CONFIG_QCA8033_PHY) += ipq_common/ipq_qca8033.o +obj-$(CONFIG_QCA8081_PHY) += ipq_common/ipq_qca8081.o obj-$(CONFIG_QCA_AQUANTIA_PHY) += ipq807x/ipq807x_aquantia_phy.o diff --git a/drivers/net/ipq_common/ipq_qca8081.c b/drivers/net/ipq_common/ipq_qca8081.c new file mode 100644 index 0000000000..d4a9f4cfdf --- /dev/null +++ b/drivers/net/ipq_common/ipq_qca8081.c @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. +*/ +#include +#include +#include +#include +#include +#include +#include "ipq_qca8081.h" +#include "ipq_phy.h" + +extern int ipq_mdio_write(int mii_id, + int regnum, u16 value); +extern int ipq_mdio_read(int mii_id, + int regnum, ushort *data); + +static u16 qca8081_phy_reg_write(u32 dev_id, u32 phy_id, + u32 reg_id, u16 reg_val) +{ + ipq_mdio_write(phy_id, reg_id, reg_val); + return 0; +} + +u16 qca8081_phy_reg_read(u32 dev_id, u32 phy_id, u32 reg_id) +{ + return ipq_mdio_read(phy_id, reg_id, NULL); +} + +u8 qca8081_phy_get_link_status(u32 dev_id, u32 phy_id) +{ + u16 phy_data; + phy_data = qca8081_phy_reg_read(dev_id, + phy_id, QCA8081_PHY_SPEC_STATUS); + if (phy_data & QCA8081_STATUS_LINK_PASS) + return 0; + + return 1; +} + +u32 qca8081_phy_get_duplex(u32 dev_id, u32 phy_id, fal_port_duplex_t *duplex) +{ + u16 phy_data; + + phy_data = qca8081_phy_reg_read(dev_id, phy_id, + QCA8081_PHY_SPEC_STATUS); + + /* + * Read duplex + */ + if (phy_data & QCA8081_STATUS_FULL_DUPLEX) + *duplex = FAL_FULL_DUPLEX; + else + *duplex = FAL_HALF_DUPLEX; + + return 0; +} + +u32 qca8081_phy_get_speed(u32 dev_id, u32 phy_id, fal_port_speed_t *speed) +{ + u16 phy_data; + + phy_data = qca8081_phy_reg_read(dev_id, + phy_id, QCA8081_PHY_SPEC_STATUS); + + switch (phy_data & QCA8081_STATUS_SPEED_MASK) { + case QCA8081_STATUS_SPEED_2500MBS: + *speed = FAL_SPEED_2500; + break; + case QCA8081_STATUS_SPEED_1000MBS: + *speed = FAL_SPEED_1000; + break; + case QCA8081_STATUS_SPEED_100MBS: + *speed = FAL_SPEED_100; + break; + case QCA8081_STATUS_SPEED_10MBS: + *speed = FAL_SPEED_10; + break; + default: + return -EINVAL; + } + return 0; +} + +int ipq_qca8081_phy_init(struct phy_ops **ops, u32 phy_id) +{ + u16 phy_data; + struct phy_ops *qca8081_ops; + qca8081_ops = (struct phy_ops *)malloc(sizeof(struct phy_ops)); + if (!qca8081_ops) + return -ENOMEM; + qca8081_ops->phy_get_link_status = qca8081_phy_get_link_status; + qca8081_ops->phy_get_speed = qca8081_phy_get_speed; + qca8081_ops->phy_get_duplex = qca8081_phy_get_duplex; + *ops = qca8081_ops; + + phy_data = qca8081_phy_reg_read(0x0, phy_id, QCA8081_PHY_ID1); + printf ("PHY ID1: 0x%x\n", phy_data); + phy_data = qca8081_phy_reg_read(0x0, phy_id, QCA8081_PHY_ID2); + printf ("PHY ID2: 0x%x\n", phy_data); + + return 0; +} diff --git a/drivers/net/ipq_common/ipq_qca8081.h b/drivers/net/ipq_common/ipq_qca8081.h new file mode 100644 index 0000000000..810418b7c3 --- /dev/null +++ b/drivers/net/ipq_common/ipq_qca8081.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. +*/ + +#ifndef _QCA8081_PHY_H_ +#define _QCA8081_PHY_H_ + +/* PHY Registers */ +#define QCA8081_PHY_CONTROL 0 +#define QCA8081_PHY_STATUS 1 +#define QCA8081_PHY_SPEC_STATUS 17 + +#define QCA8081_PHY_ID1 2 +#define QCA8081_PHY_ID2 3 +#define QCA8081_AUTONEG_ADVERT 4 +#define QCA8081_LINK_PARTNER_ABILITY 5 +#define QCA8081_1000BASET_CONTROL 9 +#define QCA8081_1000BASET_STATUS 10 +#define QCA8081_MMD_CTRL_REG 13 +#define QCA8081_MMD_DATA_REG 14 +#define QCA8081_EXTENDED_STATUS 15 +#define QCA8081_PHY_SPEC_CONTROL 16 +#define QCA8081_PHY_INTR_MASK 18 +#define QCA8081_PHY_INTR_STATUS 19 +#define QCA8081_PHY_CDT_CONTROL 22 +#define QCA8081_DEBUG_PORT_ADDRESS 29 +#define QCA8081_DEBUG_PORT_DATA 30 + +#define QCA8081_STATUS_LINK_PASS 0x0400 + +#define QCA8081_STATUS_FULL_DUPLEX 0x2000 + +#define QCA8081_STATUS_SPEED_MASK 0x380 +#define QCA8081_STATUS_SPEED_2500MBS 0x200 +#define QCA8081_STATUS_SPEED_1000MBS 0x100 +#define QCA8081_STATUS_SPEED_100MBS 0x80 +#define QCA8081_STATUS_SPEED_10MBS 0x0000 + +#endif /* _QCA8081_PHY_H_ */ diff --git a/include/configs/ipq807x.h b/include/configs/ipq807x.h index dccb3e52d9..2e510f7cd3 100644 --- a/include/configs/ipq807x.h +++ b/include/configs/ipq807x.h @@ -303,6 +303,7 @@ extern loff_t board_env_size; #define CONFIG_IPQ_MDIO 1 #define CONFIG_QCA8075_PHY 1 #define CONFIG_QCA8033_PHY 1 +#define CONFIG_QCA8081_PHY 1 #define CONFIG_QCA_AQUANTIA_PHY 1 #define CONFIG_IPQ_ETH_INIT_DEFER