mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2025-12-10 07:44:53 +01:00
MIPS: qca956x: enable the flash driver
This change enables the flash driver on u-boot for the AP152 target. Change-Id: I9778adf4a4d347fdcce16fbfede87f765302595c Signed-off-by: Prabhu Jayakumar <pjayak@codeaurora.org>
This commit is contained in:
Prabhu Jayakumar
parent
c4c0122082
commit
aee2b6dbdd
6 changed files with 544 additions and 4 deletions
436
board/qca/mips32/common/ath_flash.c
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436
board/qca/mips32/common/ath_flash.c
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/*
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* Copyright (c) 2016 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <jffs2/jffs2.h>
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#include <asm/addrspace.h>
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#include <asm/types.h>
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#include <atheros.h>
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#include "ath_flash.h"
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#if !defined(ATH_DUAL_FLASH)
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# define ath_spi_flash_print_info flash_print_info
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#endif
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#define ATH_16M_FLASH_SIZE 0x1000000
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#define ATH_GET_EXT_3BS(addr) ((addr) % ATH_16M_FLASH_SIZE)
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#define ATH_GET_EXT_4B(addr) ((addr) >> 24)
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/*
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* globals
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*/
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
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/*
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* statics
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*/
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static void ath_spi_write_enable(void);
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static void ath_spi_poll(void);
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#if !defined(ATH_SST_FLASH)
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static void ath_spi_write_page(uint32_t addr, uint8_t * data, int len);
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#endif
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static void ath_spi_sector_erase(uint32_t addr);
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#if defined(ATH_DUAL_NOR)
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static void ath_spi_enter_ext_addr(u8 addr)
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{
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ath_spi_write_enable();
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ath_reg_wr_nf(ATH_SPI_WRITE, ATH_SPI_CS_DIS);
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ath_spi_bit_banger(ATH_SPI_CMD_WR_EXT);
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ath_spi_bit_banger(addr);
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ath_spi_go();
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ath_spi_poll();
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}
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static void ath_spi_exit_ext_addr(int ext)
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{
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if (ext)
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ath_spi_enter_ext_addr(0);
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}
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#else
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#define ath_spi_enter_ext_addr(addr)
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#define ath_spi_exit_ext_addr(ext)
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#endif
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static void
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ath_spi_read_id(void)
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{
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u32 rd;
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ath_reg_wr_nf(ATH_SPI_WRITE, ATH_SPI_CS_DIS);
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ath_spi_bit_banger(ATH_SPI_CMD_RDID);
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ath_spi_delay_8();
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ath_spi_delay_8();
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ath_spi_delay_8();
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ath_spi_go();
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rd = ath_reg_rd(ATH_SPI_RD_STATUS);
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printf("Flash Manuf Id 0x%x, DeviceId0 0x%x, DeviceId1 0x%x\n",
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(rd >> 16) & 0xff, (rd >> 8) & 0xff, (rd >> 0) & 0xff);
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}
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#ifdef ATH_SST_FLASH
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void ath_spi_flash_unblock(void)
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{
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ath_spi_write_enable();
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ath_spi_bit_banger(ATH_SPI_CMD_WRITE_SR);
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ath_spi_bit_banger(0x0);
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ath_spi_go();
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ath_spi_poll();
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}
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#endif
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#if defined(CONFIG_ATH_SPI_CS1_GPIO)
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#define ATH_SPI_CS0_GPIO 5
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static void ath_gpio_config_output(int gpio)
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{
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#if defined(CONFIG_MACH_AR934x) || \
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defined(CONFIG_MACH_QCA955x) || \
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defined(CONFIG_MACH_QCA953x) || \
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defined(CONFIG_MACH_QCA956x)
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ath_reg_rmw_clear(ATH_GPIO_OE, (1 << gpio));
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#else
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ath_reg_rmw_set(ATH_GPIO_OE, (1 << gpio));
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#endif
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}
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static void ath_gpio_set_fn(int gpio, int fn)
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{
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#define gpio_fn_reg(x) ((x) / 4)
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#define gpio_lsb(x) (((x) % 4) * 8)
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#define gpio_msb(x) (gpio_lsb(x) + 7)
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#define gpio_mask(x) (0xffu << gpio_lsb(x))
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#define gpio_set(x, f) (((f) & 0xffu) << gpio_lsb(x))
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uint32_t *reg = ((uint32_t *)GPIO_OUT_FUNCTION0_ADDRESS) +
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gpio_fn_reg(gpio);
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ath_reg_wr(reg, (ath_reg_rd(reg) & ~gpio_mask(gpio)) | gpio_set(gpio, fn));
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}
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int ath_spi_flash_get_fn_cs0(void)
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{
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#if CONFIG_MACH_QCA934x
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return 0x09;
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#elif (CONFIG_MACH_QCA953x || CONFIG_MACH_QCA955x)
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return 0x09;
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#endif
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return -1;
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}
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int ath_spi_flash_get_fn_cs1(void)
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{
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#if CONFIG_MACH_QCA934x
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return 0x07;
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#elif (CONFIG_MACH_QCA953x || CONFIG_MACH_QCA955x)
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return 0x0a;
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#endif
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return -1;
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}
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void ath_spi_flash_enable_cs1(void)
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{
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int fn = ath_spi_flash_get_fn_cs1();
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if (fn < 0) {
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printf("Error, enable SPI_CS_1 failed\n");
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return;
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}
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ath_gpio_set_fn(CONFIG_ATH_SPI_CS1_GPIO,
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ath_spi_flash_get_fn_cs1());
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ath_gpio_config_output(CONFIG_ATH_SPI_CS1_GPIO);
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}
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#else
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#define ath_spi_flash_enable_cs1(...)
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#endif
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int flash_select(int chip)
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{
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#if defined(CONFIG_ATH_SPI_CS1_GPIO)
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int fn_cs0, fn_cs1;
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fn_cs0 = ath_spi_flash_get_fn_cs0();
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fn_cs1 = ath_spi_flash_get_fn_cs1();
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if (fn_cs0 < 0 || fn_cs1 < 0) {
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printf("Error, flash select failed\n");
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return -1;
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}
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#endif
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switch (chip) {
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case 0:
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#if defined(CONFIG_ATH_SPI_CS1_GPIO)
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ath_gpio_set_fn(CONFIG_ATH_SPI_CS1_GPIO, fn_cs1);
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ath_gpio_set_fn(ATH_SPI_CS0_GPIO, fn_cs0);
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#elif defined(ATH_DUAL_NOR)
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ath_reg_rmw_set(ATH_SPI_FS, 1);
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ath_spi_exit_ext_addr(1);
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ath_reg_rmw_clear(ATH_SPI_FS, 1);
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#endif
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break;
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case 1:
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#if defined(CONFIG_ATH_SPI_CS1_GPIO)
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ath_gpio_set_fn(ATH_SPI_CS0_GPIO, 0);
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ath_gpio_set_fn(CONFIG_ATH_SPI_CS1_GPIO, fn_cs0);
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#elif defined(ATH_DUAL_NOR)
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ath_reg_rmw_set(ATH_SPI_FS, 1);
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ath_spi_enter_ext_addr(1);
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ath_reg_rmw_clear(ATH_SPI_FS, 1);
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#endif
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break;
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default:
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printf("Error, please specify correct flash number 0/1\n");
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return -1;
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}
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return 0;
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}
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unsigned long flash_init(void)
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{
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#if !(defined(CONFIG_WASP_SUPPORT) || defined(CONFIG_MACH_QCA955x) || defined(CONFIG_MACH_QCA956x))
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#ifdef ATH_SST_FLASH
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ath_reg_wr_nf(ATH_SPI_CLOCK, 0x3);
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ath_spi_flash_unblock();
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ath_reg_wr(ATH_SPI_FS, 0);
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#else
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ath_reg_wr_nf(ATH_SPI_CLOCK, 0x43);
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#endif
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#endif
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#if defined(CONFIG_MACH_QCA953x) /* Added for HB-SMIC */
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#ifdef ATH_SST_FLASH
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ath_reg_wr_nf(ATH_SPI_CLOCK, 0x4);
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ath_spi_flash_unblock();
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ath_reg_wr(ATH_SPI_FS, 0);
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#else
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ath_reg_wr_nf(ATH_SPI_CLOCK, 0x44);
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#endif
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#endif
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ath_reg_rmw_set(ATH_SPI_FS, 1);
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ath_spi_read_id();
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ath_spi_exit_ext_addr(1);
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ath_reg_rmw_clear(ATH_SPI_FS, 1);
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ath_spi_flash_enable_cs1();
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/*
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* hook into board specific code to fill flash_info
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*/
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return (flash_get_geom(&flash_info[0]));
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}
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void
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ath_spi_flash_print_info(flash_info_t *info)
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{
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printf("The hell do you want flinfo for??\n");
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}
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int
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flash_erase(flash_info_t *info, int s_first, int s_last)
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{
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u32 addr;
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int ext = 0;
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int i, sector_size = info->size / info->sector_count;
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printf("\nFirst %#x last %#x sector size %#x\n",
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s_first, s_last, sector_size);
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addr = s_first * sector_size;
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if (addr >= ATH_16M_FLASH_SIZE) {
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ext = 1;
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ath_spi_enter_ext_addr(ATH_GET_EXT_4B(addr));
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} else if (s_last * sector_size >= ATH_16M_FLASH_SIZE) {
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printf("Erase failed, cross 16M is forbidden\n");
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return -1;
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}
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for (i = s_first; i <= s_last; i++) {
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addr = i * sector_size;
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if (ext)
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addr = ATH_GET_EXT_3BS(addr);
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printf("\b\b\b\b%4d", i);
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ath_spi_sector_erase(addr);
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}
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ath_spi_exit_ext_addr(ext);
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ath_spi_done();
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printf("\n");
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return 0;
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}
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/*
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* Write a buffer from memory to flash:
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* 0. Assumption: Caller has already erased the appropriate sectors.
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* 1. call page programming for every 256 bytes
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*/
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#ifdef ATH_SST_FLASH
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void
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ath_spi_flash_chip_erase(void)
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{
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ath_spi_write_enable();
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ath_spi_bit_banger(ATH_SPI_CMD_CHIP_ERASE);
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ath_spi_go();
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ath_spi_poll();
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}
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int
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write_buff(flash_info_t *info, uchar *src, ulong dst, ulong len)
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{
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uint32_t val;
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dst = dst - CFG_FLASH_BASE;
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printf("write len: %lu dst: 0x%x src: %p\n", len, dst, src);
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for (; len; len--, dst++, src++) {
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ath_spi_write_enable(); // dont move this above 'for'
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ath_spi_bit_banger(ATH_SPI_CMD_PAGE_PROG);
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ath_spi_send_addr(dst);
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val = *src & 0xff;
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ath_spi_bit_banger(val);
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ath_spi_go();
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ath_spi_poll();
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}
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/*
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* Disable the Function Select
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* Without this we can't read from the chip again
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*/
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ath_reg_wr(ATH_SPI_FS, 0);
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if (len) {
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// how to differentiate errors ??
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return ERR_PROG_ERROR;
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} else {
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return ERR_OK;
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}
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}
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#else
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int
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write_buff(flash_info_t *info, uchar *source, ulong addr, ulong len)
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{
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int total = 0, len_this_lp, bytes_this_page;
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ulong dst;
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uchar *src;
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int ext = 0;
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printf("write addr: %x\n", addr);
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addr = addr - CFG_FLASH_BASE;
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if (addr >= ATH_16M_FLASH_SIZE) {
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ext = 1;
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ath_spi_enter_ext_addr(ATH_GET_EXT_4B(addr));
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addr = ATH_GET_EXT_3BS(addr);
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} else if (addr + len >= ATH_16M_FLASH_SIZE) {
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printf("Write failed, cross 16M is forbidden\n");
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return -1;
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}
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while (total < len) {
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src = source + total;
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dst = addr + total;
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bytes_this_page =
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ATH_SPI_PAGE_SIZE - (addr % ATH_SPI_PAGE_SIZE);
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len_this_lp =
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((len - total) >
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bytes_this_page) ? bytes_this_page : (len - total);
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ath_spi_write_page(dst, src, len_this_lp);
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total += len_this_lp;
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}
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ath_spi_exit_ext_addr(ext);
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ath_spi_done();
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return 0;
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}
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#endif
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static void
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ath_spi_write_enable()
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{
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ath_reg_wr_nf(ATH_SPI_FS, 1);
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ath_reg_wr_nf(ATH_SPI_WRITE, ATH_SPI_CS_DIS);
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ath_spi_bit_banger(ATH_SPI_CMD_WREN);
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ath_spi_go();
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}
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static void
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ath_spi_poll()
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{
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int rd;
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do {
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ath_reg_wr_nf(ATH_SPI_WRITE, ATH_SPI_CS_DIS);
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ath_spi_bit_banger(ATH_SPI_CMD_RD_STATUS);
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ath_spi_delay_8();
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rd = (ath_reg_rd(ATH_SPI_RD_STATUS) & 1);
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} while (rd);
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}
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#if !defined(ATH_SST_FLASH)
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static void
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ath_spi_write_page(uint32_t addr, uint8_t *data, int len)
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{
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int i;
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uint8_t ch;
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display(0x77);
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ath_spi_write_enable();
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ath_spi_bit_banger(ATH_SPI_CMD_PAGE_PROG);
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ath_spi_send_addr(addr);
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for (i = 0; i < len; i++) {
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ch = *(data + i);
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ath_spi_bit_banger(ch);
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}
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ath_spi_go();
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display(0x66);
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ath_spi_poll();
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display(0x6d);
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}
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#endif
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static void
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ath_spi_sector_erase(uint32_t addr)
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{
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ath_spi_write_enable();
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ath_spi_bit_banger(ATH_SPI_CMD_SECTOR_ERASE);
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ath_spi_send_addr(addr);
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ath_spi_go();
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display(0x7d);
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ath_spi_poll();
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}
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#ifdef ATH_DUAL_FLASH
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void flash_print_info(flash_info_t *info)
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{
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ath_spi_flash_print_info(NULL);
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ath_nand_flash_print_info(NULL);
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}
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#endif
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53
board/qca/mips32/common/ath_flash.h
Normal file
53
board/qca/mips32/common/ath_flash.h
Normal file
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@ -0,0 +1,53 @@
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/*
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* Copyright (c) 2016 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
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*
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*/
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#ifndef _ATH_FLASH_H
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#define _ATH_FLASH_H
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#define display(_x)
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/*
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* primitives
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*/
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#define ath_be_msb(_val, _i) (((_val) & (1 << (7 - _i))) >> (7 - _i))
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#define ath_spi_bit_banger(_byte) do { \
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int i; \
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for(i = 0; i < 8; i++) { \
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ath_reg_wr_nf(ATH_SPI_WRITE, \
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ATH_SPI_CE_LOW | ath_be_msb(_byte, i)); \
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ath_reg_wr_nf(ATH_SPI_WRITE, \
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ATH_SPI_CE_HIGH | ath_be_msb(_byte, i)); \
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} \
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} while (0)
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#define ath_spi_go() do { \
|
||||
ath_reg_wr_nf(ATH_SPI_WRITE, ATH_SPI_CE_LOW); \
|
||||
ath_reg_wr_nf(ATH_SPI_WRITE, ATH_SPI_CS_DIS); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define ath_spi_send_addr(__a) do { \
|
||||
ath_spi_bit_banger(((__a & 0xff0000) >> 16)); \
|
||||
ath_spi_bit_banger(((__a & 0x00ff00) >> 8)); \
|
||||
ath_spi_bit_banger(__a & 0x0000ff); \
|
||||
} while (0)
|
||||
|
||||
#define ath_spi_delay_8() ath_spi_bit_banger(0)
|
||||
#define ath_spi_done() ath_reg_wr_nf(ATH_SPI_FS, 0)
|
||||
|
||||
extern unsigned long flash_get_geom (flash_info_t *flash_info);
|
||||
|
||||
#endif /* _ATH_FLASH_H */
|
||||
|
|
@ -1,3 +1,4 @@
|
|||
obj-y := board956x.o extra.o ../common/init-956x.o \
|
||||
../common/956x.o ../common/tap-956x.o \
|
||||
../common/ath_serial.o ../common/qca-mach-common.o
|
||||
../common/ath_serial.o ../common/qca-mach-common.o \
|
||||
flash.o ../common/ath_flash.o
|
||||
|
|
|
|||
46
board/qca/mips32/qca956x/flash.c
Normal file
46
board/qca/mips32/qca956x/flash.c
Normal file
|
|
@ -0,0 +1,46 @@
|
|||
/*
|
||||
* Copyright (c) 2016 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <config.h>
|
||||
#include <asm/types.h>
|
||||
#include <flash.h>
|
||||
|
||||
#ifndef CONFIG_ATH_NAND_BR
|
||||
/*
|
||||
* sets up flash_info and returns size of FLASH (bytes)
|
||||
*/
|
||||
unsigned long
|
||||
flash_get_geom (flash_info_t *flash_info)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* XXX this is hardcoded until we figure out how to read flash id */
|
||||
|
||||
flash_info->flash_id = FLASH_M25P64;
|
||||
flash_info->size = CFG_FLASH_SIZE; /* bytes */
|
||||
flash_info->sector_count = flash_info->size / CFG_FLASH_SECTOR_SIZE;
|
||||
|
||||
for (i = 0; i < flash_info->sector_count; i++) {
|
||||
flash_info->start[i] = CFG_FLASH_BASE +
|
||||
(i * CFG_FLASH_SECTOR_SIZE);
|
||||
flash_info->protect[i] = 0;
|
||||
}
|
||||
|
||||
printf ("flash size %dMB, sector count = %d\n",
|
||||
FLASH_SIZE, flash_info->sector_count);
|
||||
|
||||
return (flash_info->size);
|
||||
}
|
||||
#endif /* CONFIG_ATH_NAND_BR */
|
||||
|
|
@ -142,9 +142,7 @@
|
|||
#define CFG_FLASH_SECTOR_SIZE_F CFG_FLASH_SECTOR_SIZE
|
||||
#endif
|
||||
|
||||
#define CONFIG_ENV_IS_NOWHERE 1
|
||||
#define CONFIG_SYS_NO_FLASH 1
|
||||
//#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_SIZE CFG_FLASH_SECTOR_SIZE //CFG_ENV_SIZE
|
||||
#define CONFIG_ENV_ADDR 0x9f040000
|
||||
|
||||
|
|
@ -165,6 +163,11 @@
|
|||
#define __CONFIG_BOARD_NAME ap152
|
||||
#define CONFIG_BOARD_NAME "ap152"
|
||||
|
||||
#if defined(CONFIG_CUS249) || defined(CONFIG_TB753)
|
||||
#else
|
||||
#define CONFIG_USB 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
** Parameters defining the location of the calibration/initialization
|
||||
** information for the two Merlin devices.
|
||||
|
|
|
|||
|
|
@ -468,6 +468,7 @@ extern flash_info_t *flash_get_info(ulong base);
|
|||
#define FLASH_STM32F4 0x00F2 /* STM32F4 Embedded Flash */
|
||||
#define FLASH_STM32F1 0x00F3 /* STM32F1 Embedded Flash */
|
||||
|
||||
#define FLASH_M25P64 0x00F2
|
||||
#define FLASH_UNKNOWN 0xFFFF /* unknown flash type */
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue