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mx6: imx-regs: Provide a structure for GPC registers

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Introduce a structure for accessing the General Power Controller block (GPC)
registers.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Fabio Estevam 2014-08-25 14:26:44 -03:00 • committed by Stefano Babic
parent 19a895cbe9
commit ac17dcf653
1 changed files with 13 additions and 0 deletions
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13
arch/arm/include/asm/arch-mx6/imx-regs.h
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@ -419,6 +419,19 @@ struct iomuxc {
u32 gpr[14];
};
struct gpc {
u32 cntr;
u32 pgr;
u32 imr1;
u32 imr2;
u32 imr3;
u32 imr4;
u32 isr1;
u32 isr2;
u32 isr3;
u32 isr4;
};
#define IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET 20
#define IOMUXC_GPR2_COUNTER_RESET_VAL_MASK (3<<IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET)
#define IOMUXC_GPR2_LVDS_CLK_SHIFT_OFFSET 16