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MIPS: handle mips64 relocs in mips32 start.S

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In preparation for sharing a single copy of start.S between mips32 &
mips64, handle mips64 relocations in the mips32 start.S when built for
mips64.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This commit is contained in:
Paul Burton 2015-01-29 10:04:09 +00:00 • committed by Daniel Schwierzeck
parent a39b1cb7f0
commit ab0d002677
1 changed files with 17 additions and 2 deletions
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19
arch/mips/cpu/mips32/start.S
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@ -21,6 +21,21 @@
CONFIG_SYS_INIT_SP_OFFSET) CONFIG_SYS_INIT_SP_OFFSET)
#endif #endif
#ifdef CONFIG_32BIT
# define MIPS_RELOC 3
#endif
#ifdef CONFIG_64BIT
# ifdef CONFIG_SYS_LITTLE_ENDIAN
# define MIPS64_R_INFO(ssym, r_type3, r_type2, r_type) \
(((r_type) << 24) | ((r_type2) << 16) | ((r_type3) << 8) | (ssym))
# else
# define MIPS64_R_INFO(ssym, r_type3, r_type2, r_type) \
((r_type) | ((r_type2) << 8) | ((r_type3) << 16) | (ssym) << 24)
# endif
# define MIPS_RELOC MIPS64_R_INFO(0x00, 0x00, 0x12, 0x03)
#endif
/* /*
* For the moment disable interrupts, mark the kernel mode and * For the moment disable interrupts, mark the kernel mode and
* set ST0_KX so that the CPU does not spit fire when using * set ST0_KX so that the CPU does not spit fire when using
@ -264,8 +279,8 @@ in_ram:
1: 1:
lw t8, -4(t1) # t8 <-- relocation info lw t8, -4(t1) # t8 <-- relocation info
PTR_LI t3, 3 PTR_LI t3, MIPS_RELOC
bne t8, t3, 2f # skip non R_MIPS_REL32 entries bne t8, t3, 2f # skip non-MIPS_RELOC entries
nop nop
PTR_L t3, -(2 * PTRSIZE)(t1) # t3 <-- location to fix up in FLASH PTR_L t3, -(2 * PTRSIZE)(t1) # t3 <-- location to fix up in FLASH