From a91b6759b1c6bccd862b0b2777eec1851535977e Mon Sep 17 00:00:00 2001
From: Saahil Tomar <quic_saahtoma@quicinc.com>
Date: Thu, 23 Nov 2023 16:57:54 +0530
Subject: [PATCH] arch: arm: dts: Enable SPI NOR support for MI01.2

Change-Id: I3c823cde2dcde912169da878bba0569b5c9b088a
Signed-off-by: Saahil Tomar <quic_saahtoma@quicinc.com>
---
 arch/arm/dts/ipq5332-mi01.2.dts | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/dts/ipq5332-mi01.2.dts b/arch/arm/dts/ipq5332-mi01.2.dts
index 28521bb980..277349c5ef 100644
--- a/arch/arm/dts/ipq5332-mi01.2.dts
+++ b/arch/arm/dts/ipq5332-mi01.2.dts
@@ -47,6 +47,38 @@
 		};
 	};
 
+	spi {
+		spi_gpio {
+			blsp0_spi_clk {
+				gpio = <14>;
+				func = <1>;
+				pull = <GPIO_PULL_DOWN>;
+				oe = <GPIO_OE_ENABLE>;
+				drvstr = <GPIO_8MA>;
+			};
+			blsp0_spi_mosi {
+				gpio = <15>;
+				func = <1>;
+				pull = <GPIO_PULL_DOWN>;
+				oe = <GPIO_OE_ENABLE>;
+				drvstr = <GPIO_8MA>;
+			};
+			blsp0_spi_miso {
+				gpio = <16>;
+				func = <1>;
+				pull = <GPIO_PULL_DOWN>;
+				drvstr = <GPIO_8MA>;
+			};
+			blsp0_spi_cs {
+				gpio = <17>;
+				func = <1>;
+				pull = <GPIO_PULL_UP>;
+				oe = <GPIO_OE_ENABLE>;
+				drvstr = <GPIO_8MA>;
+			};
+		};
+	};
+
 	i2c@78B6000 {
 		i2c_gpio {
 			gpio1 {