diff --git a/arch/arm/include/asm/arch-ipq5332/clk.h b/arch/arm/include/asm/arch-ipq5332/clk.h
index 1340b2630c..7e061e5510 100644
--- a/arch/arm/include/asm/arch-ipq5332/clk.h
+++ b/arch/arm/include/asm/arch-ipq5332/clk.h
@@ -21,6 +21,7 @@
 /*
  * UART registers
  */
+#define GCC_APCS_CLOCK_BRANCH_ENA_VOTE		0x180B004
 #define GCC_BLSP1_UART1_BCR			0x1802028
 #define GCC_BLSP1_UART2_BCR			0x1803028
 #define GCC_BLSP1_UART3_BCR			0x1804028
@@ -44,6 +45,7 @@
 #define GCC_UART_CFG_RCGR_SRCSEL_SHIFT		8
 #define GCC_UART_CFG_RCGR_SRCDIV_SHIFT		0
 
+#define BLSP1_AHB_CLK_ENABLE			0x16
 #define UART_RCGR_SRC_SEL			0x1
 #define UART_RCGR_SRC_DIV			0x0
 #define UART_RCGR_MODE				0x2
diff --git a/board/qca/arm/ipq5332/clock.c b/board/qca/arm/ipq5332/clock.c
index 9987e6e2e1..e3ade1ff9d 100644
--- a/board/qca/arm/ipq5332/clock.c
+++ b/board/qca/arm/ipq5332/clock.c
@@ -64,6 +64,10 @@ int uart_clock_config(struct ipq_serial_platdata *plat)
 	unsigned long cbcr_val;
 	int ret;
 
+	cbcr_val = readl(GCC_APCS_CLOCK_BRANCH_ENA_VOTE);
+	cbcr_val |= BLSP1_AHB_CLK_ENABLE;
+	writel(cbcr_val, GCC_APCS_CLOCK_BRANCH_ENA_VOTE);
+
 	uart_configure_mux(plat->port_id);
 
 	writel(plat->m_value, GCC_BLSP1_UART_APPS_M(plat->port_id));