Merge "drivers: net: ipq6018: Add support for AQ and SFP"

This commit is contained in:
Linux Build Service Account 2019-07-02 12:34:44 -07:00 committed by Gerrit - the friendly Code Review server
commit a54c74bd89
6 changed files with 36 additions and 59 deletions

View file

@ -101,7 +101,6 @@ CONFIG_CMD_NET=y
CONFIG_QCA8075_PHY=y
CONFIG_QCA8033_PHY=y
CONFIG_QCA8081_PHY=y
CONFIG_IPQ6018_QCA_AQUANTIA_PHY=y
#
# Misc commands

View file

@ -967,11 +967,13 @@ static int ipq6018_eth_init(struct eth_device *eth_dev, bd_t *this)
break;
case FAL_SPEED_100:
mac_speed = 0x1;
if (i == aquantia_port && i == 4)
if (i == aquantia_port) {
speed_clock1 = 0x309;
else
speed_clock2 = 0x4;
} else {
speed_clock1 = 0x109;
speed_clock2 = 0x0;
speed_clock2 = 0x0;
}
printf ("eth%d PHY%d %s Speed :%d %s duplex\n",
priv->mac_unit, i, lstatus[status], speed,
dp[duplex]);
@ -985,12 +987,9 @@ static int ipq6018_eth_init(struct eth_device *eth_dev, bd_t *this)
break;
case FAL_SPEED_1000:
mac_speed = 0x2;
if (i == aquantia_port) {
if (i == 4)
speed_clock1 = 0x304;
else
speed_clock1 = 0x104;
} else
if (i == aquantia_port)
speed_clock1 = 0x304;
else
speed_clock1 = 0x101;
speed_clock2 = 0x0;
printf ("eth%d PHY%d %s Speed :%d %s duplex\n",
@ -1005,6 +1004,11 @@ static int ipq6018_eth_init(struct eth_device *eth_dev, bd_t *this)
}
break;
case FAL_SPEED_2500:
if (i == aquantia_port) {
mac_speed = 0x4;
speed_clock1 = 0x307;
speed_clock2 = 0x0;
}
if (phy_node >= 0) {
if (phy_info[i]->phy_type == QCA8081_PHY_TYPE) {
mac_speed = 0x2;
@ -1014,23 +1018,7 @@ static int ipq6018_eth_init(struct eth_device *eth_dev, bd_t *this)
else if (i == 3)
speed_clock1 = 0x101;
speed_clock2 = 0x0;
} else if (phy_info[i]->phy_type == AQ_PHY_TYPE) {
mac_speed = 0x4;
if (i == 4) {
speed_clock1 = 0x301;
speed_clock2 = 0x3;
} else if (i == 3) {
speed_clock1 = 0x107;
speed_clock2 = 0x0;
}
}
} else {
mac_speed = 0x4;
if (i == 4)
speed_clock1 = 0x307;
else
speed_clock1 = 0x107;
speed_clock2 = 0x0;
}
printf ("eth%d PHY%d %s Speed :%d %s duplex\n",
priv->mac_unit, i, lstatus[status], speed,
@ -1038,10 +1026,7 @@ static int ipq6018_eth_init(struct eth_device *eth_dev, bd_t *this)
break;
case FAL_SPEED_5000:
mac_speed = 0x5;
if (i == 4)
speed_clock1 = 0x303;
else
speed_clock1 = 0x103;
speed_clock1 = 0x303;
speed_clock2 = 0x0;
printf ("eth%d PHY%d %s Speed :%d %s duplex\n",
priv->mac_unit, i, lstatus[status], speed,
@ -1049,10 +1034,7 @@ static int ipq6018_eth_init(struct eth_device *eth_dev, bd_t *this)
break;
case FAL_SPEED_10000:
mac_speed = 0x3;
if (i == 4)
speed_clock1 = 0x301;
else
speed_clock1 = 0x101;
speed_clock1 = 0x301;
speed_clock2 = 0x0;
printf ("eth%d PHY%d %s Speed :%d %s duplex\n",
priv->mac_unit, i, lstatus[status], speed,
@ -1685,6 +1667,9 @@ int ipq6018_edma_init(void *edma_board_cfg)
if (node >= 0)
port_8033 = fdtdec_get_uint(gd->fdt_blob, node, "8033_port", -1);
if (node >= 0)
aquantia_port = fdtdec_get_uint(gd->fdt_blob, node, "aquantia_port", -1);
phy_node = fdt_path_offset(gd->fdt_blob, "/ess-switch/port_phyinfo");
if (phy_node >= 0)
get_phy_address(phy_node);

View file

@ -205,8 +205,6 @@ int phy_status_get_from_ppe(int port_id)
ipq6018_ppe_reg_read(PORT_PHY_STATUS_ADDRESS, &reg_field);
if (port_id == (PORT5 - PPE_UNIPHY_INSTANCE1))
reg_field >>= PORT_PHY_STATUS_PORT5_1_OFFSET;
else
reg_field >>= PORT_PHY_STATUS_PORT6_OFFSET;
return ((reg_field >> 7) & 0x1) ? 0 : 1;
}
@ -324,14 +322,8 @@ void ipq6018_10g_r_speed_set(int port, int status)
{
uint32_t uniphy_index;
/* Setting the speed only for PORT5 and PORT6 */
if (port == (PORT4 - PPE_UNIPHY_INSTANCE0))
uniphy_index = PPE_UNIPHY_INSTANCE0;
else if (port == (PORT5 - PPE_UNIPHY_INSTANCE0))
uniphy_index = PPE_UNIPHY_INSTANCE1;
else
return;
/* Setting the speed only for PORT5 */
uniphy_index = PPE_UNIPHY_INSTANCE1;
ppe_xgmac_10g_r_speed_set(uniphy_index - 1);
ppe_port_bridge_txmac_set(port + 1, status);
ppe_port_txmac_status_set(uniphy_index - 1);
@ -344,14 +336,8 @@ void ipq6018_uxsgmii_speed_set(int port, int speed, int duplex,
{
uint32_t uniphy_index;
/* Setting the speed only for PORT5 and PORT6 */
if (port == (PORT4 - PPE_UNIPHY_INSTANCE0))
uniphy_index = PPE_UNIPHY_INSTANCE0;
else if (port == (PORT5 - PPE_UNIPHY_INSTANCE0))
uniphy_index = PPE_UNIPHY_INSTANCE1;
else
return;
/* Setting the speed only for PORT5 */
uniphy_index = PPE_UNIPHY_INSTANCE1;
ppe_uniphy_usxgmii_autoneg_completed(uniphy_index);
ppe_uniphy_usxgmii_speed_set(uniphy_index, speed);
ppe_xgmac_speed_set(uniphy_index - 1, speed);
@ -1148,11 +1134,16 @@ static void ppe_port_mux_set(int port_id, int port_type, int mode)
}
break;
case 5:
if (mode == PORT_WRAPPER_SGMII_PLUS || mode == PORT_WRAPPER_SGMII0_RGMII4)
if (mode == PORT_WRAPPER_SGMII_PLUS || mode == PORT_WRAPPER_SGMII0_RGMII4) {
port_mux_ctrl.bf.port5_pcs_sel = CPPE_PORT5_PCS_SEL_PCS1_CHANNEL0;
else if (mode == PORT_WRAPPER_PSGMII)
port_mux_ctrl.bf.port5_pcs_sel = CPPE_PORT5_PCS_SEL_PCS0_CHANNEL4;
port_mux_ctrl.bf.port5_gmac_sel = CPPE_PORT5_GMAC_SEL_GMAC;
port_mux_ctrl.bf.port5_gmac_sel = CPPE_PORT5_GMAC_SEL_GMAC;
} else if (mode == PORT_WRAPPER_PSGMII) {
port_mux_ctrl.bf.port5_pcs_sel = CPPE_PORT5_PCS_SEL_PCS0_CHANNEL4;
port_mux_ctrl.bf.port5_gmac_sel = CPPE_PORT5_GMAC_SEL_GMAC;
} else if (mode == PORT_WRAPPER_USXGMII || mode == PORT_WRAPPER_10GBASE_R) {
port_mux_ctrl.bf.port5_pcs_sel = CPPE_PORT5_PCS_SEL_PCS1_CHANNEL0;
port_mux_ctrl.bf.port5_gmac_sel = CPPE_PORT5_GMAC_SEL_XGMAC;
}
break;
default:
break;

View file

@ -123,8 +123,7 @@ union ipo_action_u {
#define CPPE_DETECTION_PHY_FAILURE 0xFFFF
#define PORT_PHY_STATUS_ADDRESS 0x44
#define PORT_PHY_STATUS_PORT5_1_OFFSET 8
#define PORT_PHY_STATUS_PORT6_OFFSET 16
#define PORT_PHY_STATUS_PORT5_1_OFFSET 16
#define IPQ6018_PPE_IPE_L3_BASE_ADDR 0x200000
#define IPQ6018_PPE_L3_VP_PORT_TBL_ADDR (IPQ6018_PPE_IPE_L3_BASE_ADDR + 0x1000)

View file

@ -305,6 +305,7 @@ extern loff_t board_env_size;
#define CONFIG_IPQ6018_TZ_WONCE_4_ADDR 0x193d010
#define CONFIG_IPQ6018_EDMA 1
#define CONFIG_IPQ6018_QCA_AQUANTIA_PHY 1
#define CONFIG_IPQ6018_BRIDGED_MODE 1
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_SYS_RX_ETH_BUFFER 16

View file

@ -16,11 +16,13 @@
/* ESS Switch Mac Modes */
#define PORT_WRAPPER_PSGMII 0x0
#define PORT_WRAPPER_USXGMII 0x2
#define PORT_WRAPPER_SGMII_PLUS 0x6
#define PORT_WRAPPER_10GBASE_R 0x7
#define UNUSED 0xFF
/* ETH PHY Types */
#define MALIBU_PHY_TYPE 0x1
#define QCA8081_PHY_TYPE 0x2
#define AQ_PHY_TYPE 0x3
#endif