diff --git a/arch/arm/dts/ipq5332-mi01.2.dts b/arch/arm/dts/ipq5332-mi01.2.dts
index 89e9c3e224..50d3cbb767 100644
--- a/arch/arm/dts/ipq5332-mi01.2.dts
+++ b/arch/arm/dts/ipq5332-mi01.2.dts
@@ -47,7 +47,7 @@
 		};
 	};
 
-	i2c {
+	i2c@78B6000 {
 		i2c_gpio {
 			gpio1 {
 				gpio = <29>;
diff --git a/arch/arm/dts/ipq5332-mi01.4.dts b/arch/arm/dts/ipq5332-mi01.4.dts
index 2aa771d1b0..ffd9d60046 100644
--- a/arch/arm/dts/ipq5332-mi01.4.dts
+++ b/arch/arm/dts/ipq5332-mi01.4.dts
@@ -23,9 +23,9 @@
 		console = "/serial@78AF000";
 		nand = "/nand-controller@79B0000";
 		mmc = "/sdhci@7804000";
-		usb0 = "xhci@8a00000";
-		i2c0 = "/i2c@78B6000";
+		usb0 = "/xhci@8a00000";
 		pci1 = "/pci@18000000";
+		i2c0 = "/i2c@78B6000";
 	};
 
 	serial@78AF000 {
@@ -46,7 +46,7 @@
 		};
 	};
 
-	i2c {
+	i2c@78B6000 {
 		i2c_gpio {
 			gpio1 {
 				gpio = <29>;
@@ -148,6 +148,10 @@
 		};
 	};
 
+	usb0: xhci@8a00000 {
+		ssphy = <1>;
+	};
+
 	pci1: pci@18000000 {
 		status = "ok";
 		perst_gpio = <47>;
diff --git a/board/qca/arm/ipq5332/ipq5332.c b/board/qca/arm/ipq5332/ipq5332.c
index e355a84e44..a63aac09f2 100644
--- a/board/qca/arm/ipq5332/ipq5332.c
+++ b/board/qca/arm/ipq5332/ipq5332.c
@@ -584,14 +584,6 @@ static void usb_init_ssphy(void __iomem *phybase)
 	writel(CLK_ENABLE, GCC_USB0_PHY_CFG_AHB_CBCR);
 	writel(CLK_ENABLE, GCC_USB0_PIPE_CBCR);
 	udelay(100);
-	/*set frequency initial value*/
-	writel(0x1cb9, phybase + SSCG_CTRL_REG_4);
-	writel(0x023a, phybase + SSCG_CTRL_REG_5);
-	/*set spectrum spread count*/
-	writel(0xd360, phybase + SSCG_CTRL_REG_3);
-	/*set fstep*/
-	writel(0x1, phybase + SSCG_CTRL_REG_1);
-	writel(0xeb, phybase + SSCG_CTRL_REG_2);
 	return;
 }
 
diff --git a/board/qca/arm/ipq5332/ipq5332.h b/board/qca/arm/ipq5332/ipq5332.h
index 93f7d7080b..fc79fd3d95 100644
--- a/board/qca/arm/ipq5332/ipq5332.h
+++ b/board/qca/arm/ipq5332/ipq5332.h
@@ -39,8 +39,6 @@ extern const add_node_t add_fdt_node[];
 
 #define TCSR_MODE_CTRL_2PORT_2LANE		0x1947544
 
-#define USB30_GUCTL				0x8A0C12C
-
 #define DLOAD_MAGIC_COOKIE			0x10
 #define DLOAD_DISABLED				0x40
 #define DLOAD_BITS				0xFF